SN65DP159: PCB layout questions

Sam Ting

Part Number: SN65DP159

Hi team,

Regarding SN65DP159 output traces, could you please comment on the following questions? Thank you!

1. What are the recommended length specifications and mismatch tolerances between differential pairs?

2. Should differential pairs be routed on the same layer all the time? Or allow layers to be changed, what is the maximum number of vias that can be accommodated?

Best regards,
Sam Ting

over 5 years ago

0 Ikechukwu Anyiam over 5 years ago

TI__Mastermind 35130 points

Hi Sam,

1. Trace length is impacted by a lot of factors like trace impedance, length matching, number of vias, etc., so it is difficult to specify a maximum trace length. However, it's recommended that trace lengths are matched within 5 mils of each other.

2. You can route the signals on different layers but it's recommended to keep the amount of vias to less than 2.

Regards,

I.K.

0 Kyle Cheng over 5 years ago in reply to Ikechukwu Anyiam

Prodigy 50 points

Hi I.K.,

1. Is "5 mils mismatch" applied either/both on Intra-pair or Inter-pair?

2. In the datasheet, the impedance uses TYP:100 ohm. But Intel use 85 ohm impedance, should I use 85 ohm for input and 100 ohm for output of SN65DP159?
Or 85 ohm for both input and output?

Thank you.

Regards,

Kyle

0 Ikechukwu Anyiam over 5 years ago in reply to Kyle Cheng

TI__Mastermind 35130 points

Hi Kyle,

1. 5 mil for both

2. The differential impedance should be 100 ohm for both

Regards,

I.K.

0 Kyle Cheng over 5 years ago in reply to Ikechukwu Anyiam

Prodigy 50 points

Hi I.K.,

Thank you.

Regards,

Kyle

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SN65DP159: PCB layout questions