Other Parts Discussed in Thread: DP83TC811
Hello, which pins of the DP83TC811 need to see which sequence to get in BSDL- Mode ?
The DS says :
Test Mode Select: Sequences the Tap Controller (16-state FSM) to select the desired test
instruction. TI recommends applying three clock cycles with TMS HIGH to reset JTAG.
Is this all to do ?
Does other pins require certain states ,like enable/reset etc ?
Is there a timing diagram available ?
Thanks and BR Ralf