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DS90UB948-Q1: DS90UB948 Test Pattern Generation(internal clock)

Part Number: DS90UB948-Q1

Hi

 I want to use Test Pattern Generation on DS90UB948, it's work fine when use external timing, but when I switch to internal clock, I can see nothing just black screen. And DS90UB948 can't access with I2C bus any more until reboot.

With similarity steps on DS90UB928, it works fine.

And I noticed that there is no reg 0x39(PG Internal Clock Enable) in DS90UB948.

Bellow is my configure:

PG_write(2, chip, 0x03, se?2:2);//Clock Divider, 947:200MHz/95MHz=2.1, 948:140MHz/47.1MHz=1.47


//PG_write(2, chip, 0x03, se?4:3);//Clock Divider, 947:200MHz/47.1MHz=4.2, 948:140MHz/47.1MHz=2.9
//Active Frame Size
//H 1920=0x0780
//V 720=0x02D0
PG_write(2, chip, 0x07, 0x80);//Active Horizontal Width - 8 least significant bits of the 12-bit Active Horizontal Width
PG_write(2, chip, 0x08, 0x07|(0x00<<4));//bit[0:3]-4 most significant bits of the 12-bit Active Horizontal Width,
//bit[4:7]-4 least significant bits of the 12-bit Active Vertical Width
PG_write(2, chip, 0x09, 0x2D);//Active Vertical Width

//Total Frame Size
//H=1920+48=0x07B0, V=720+65=0x0311
//hback-porch = <24>;
//hfront-porch = <24>;
//hsync-len = <16>;

//vback-porch = <8>;
//vfront-porch = <57>;
//vsync-len = <7>;

PG_write(2, chip, 0x04, 0xB0);
PG_write(2, chip, 0x05, 0x07 | (1<<4));
PG_write(2, chip, 0x06, 0x31);

PG_write(2, chip, 0x0C, 0x18);//Horizontal Back Porch Width
PG_write(2, chip, 0x0D, 0x08);//Vertical Back Porch Width

PG_write(2, chip, 0x0A, 0x10);//Horizontal Sync Width
PG_write(2, chip, 0x0B, 0x07);//Vertical Sync Width

i2c_write(2, chip, 0x65, externalclock?0x03:0x07);
i2c_write(2, chip, 0x39, externalclock?0x00:0x02);
i2c_write(2, chip, 0x64, on?0x11:0x00);

Thanks!

jianxin

  • Hello Jianxin,

    Setting register 0x39 for PG is only necessary on 924 and 928 devices.  Have you tried to set up PG on the 948 without setting anything in register 0x39?

    Regards,

    Nick

  • Hi Nick,

     Thank you for reply. Yes, I tried without setting anything in register 0x39. Still not work.

    When I use external clock, everything is fine, just like this:

    busybox i2cset -yf 2 2C 0x66 0x3
    busybox i2cset -yf 2 2C 0x67 0x2
    busybox i2cset -yf 2 2C 0x66 0x7
    busybox i2cset -yf 2 2C 0x67 0x80
    busybox i2cset -yf 2 2C 0x66 0x8
    busybox i2cset -yf 2 2C 0x67 0x7
    busybox i2cset -yf 2 2C 0x66 0x9
    busybox i2cset -yf 2 2C 0x67 0x2D
    busybox i2cset -yf 2 2C 0x66 0x4
    busybox i2cset -yf 2 2C 0x67 0xB0
    busybox i2cset -yf 2 2C 0x66 0x5
    busybox i2cset -yf 2 2C 0x67 0x17
    busybox i2cset -yf 2 2C 0x66 0x6
    busybox i2cset -yf 2 2C 0x67 0x31
    busybox i2cset -yf 2 2C 0x66 0xC
    busybox i2cset -yf 2 2C 0x67 0x18
    busybox i2cset -yf 2 2C 0x66 0xD
    busybox i2cset -yf 2 2C 0x67 0x8
    busybox i2cset -yf 2 2C 0x66 0xA
    busybox i2cset -yf 2 2C 0x67 0x10
    busybox i2cset -yf 2 2C 0x66 0xB
    busybox i2cset -yf 2 2C 0x67 0x7


    busybox i2cset -yf 2 2C 0x65 0x3
    busybox i2cset -yf 2 2C 0x64 0x11

    But when I switch to internal clock with change register 0x65 value to 0x07, it's show black screen. And at this moment I2C bus access fail.

    Thanks

    jianxin

  • Jianxin,

    It seems like there is an issue with the timing and the clock divider, have you taken into account the discrepancy in the nominal internal clock frequency of the 928 and 948?  The 928 internal clock is 160MHz while the 948 is 140MHz.  Also I am confused about the I2C issue, it stops working at the exact moment you enable the pattern generator?  Have you tried this on multiple 948 devices or just the one?

    Thanks,

    Nick

  • Nick

    Yes, I noticed that the difference between 928 and 948.

    And I2C stops working at the exact moment enable the pattern generator.

    I tried some other device(same project), they can't work either.

    Thanks

    jianxin

  • Jianxin,

    Are you communicating to the 948 as a remote device? And if so does the i2c still work on the local device and just fail on the remote(948) side of the link or does it fail on both sides?

    To clarify, is the 948 paired with a compatible serializer and are you communicating to the serializer directly which communicates to the 948 over FPD-Link.

    Regards,

    Nick

  • Hi Nick

     I communicate to 948 as a remote device. I'm not sure if the local device can  access 948.

    In which case 948 can not access ? Does FPD-link shutdown?

    thanks

    jianxin

  • Jianxin,

    So you are still able to communicate to the local device just not the remote 948?  Are you able to verify on the local device that the link hasn't been lost with the 948? 

    Also be sure to set register 0x63[0] = 1.  This will power down the CML TX which must be done prior to pattern generation. 

    Regards,

    Nick