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TPS65987D: Boot Mode Pin Strapping and Dead battery Configurations

Part Number: TPS65987D

Hi,

Please check my understanding and setting about boot mode and dead battery conditions.

First, I explain feature of our board.
We design Sink only device powered from VBUS and our board boots from dead-battery conditions.
3.3V is generated by internal LDO(VBUS=>LDO_3V3), and LDO_3V3 pull-up SPI_MISO.
It does not require EC and starts up stand-alone by loading FW from S-flash.
Only capacitor is connected to PP_HV pin because I don't use PP_HV pin.
This is because I think if PP_HV is tied to GND, VBUS shorts to GND when PP_HV power switch is turned on. 

My questions are as follows

1.Is my understanding of the following correct?
When our bus-powered boards boots, the value of SPI_MISO is 1 because LDO_3V3 pulls up it before internal processor starts working.
The value of SPI_MISO is 0 when the TPS65987D does not read FW from S-flash in order for the TPS65987D to perform the minimum operation as a type-c device.

2. Which dead battery configuration is appropriate for our board?
I think BP_NoResponse, BP_WaitFor3V3_Internal, BP_NoWait is available because we don't use EC, and there are no external 3V3 power.
I think there is no difference between them because our board immediately generate 3.3V when booting.

3. Why isn't the "SPI_MISO=0, ADCIN1 DIV=0.00-0.10" on the table 5?

4. What does "Reserved" mean?

Regads,
Takumi

  • Hello,

    1. Yes that is correct. However, since you have the MISO pin pulled up to LDO_3V3, the value read during boot will always be 1 and the device will always boot from the external flash

    2. I recommend using the BP_NoWait setting since your system will always boot from the flash and powered off of VBUS

    3. Because there is no such configuration. It starts with DIV = 0.10 - 0.18

    4. It is a configuration used for internal testing/validation. Recommend using the other configurations.

  • Adam,

    Thank you for your answer!

    Regards.
    Takumi.