Other Parts Discussed in Thread: DS110DF111
Dear TI Support:
Can the PRBS generator free run at the last known VCO frequency lock with input signal and without input signal?
Would the PRBS generator tolerance relate to the oscillator tolerance?
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Dear TI Support:
Can the PRBS generator free run at the last known VCO frequency lock with input signal and without input signal?
Would the PRBS generator tolerance relate to the oscillator tolerance?
Hi,
The DS125DF111 can be configured as PRBS generator when there is a valid input signal that the CDR can lock to.
Table. PRBS Generator Programming Sequence: Requires Valid and Locked Input Data Pattern
STEP |
REGISTER ADDRESS |
REGISTER DATA |
REGISTER MASK |
COMMENTS |
1 |
0xFF |
0x0C |
0xFF (write bits[7:0]) |
Enable Broadcast |
2 |
0x09 |
0x20 |
0x20 (only write bit[5]) |
Override Loopthru Select |
3 |
0x1E |
0x80 |
0xE0 (only write bits[7:5]) |
Output MUX Select PRBS Generator |
4 |
0x1E |
0x10 |
0x10 |
Power-up PRBS Generator |
5 |
0x30 |
0x08 |
0x08 |
Power-up PRBS Clock |
6 |
0x30 |
0x00 |
0x03 |
Select PRBS9 pattern (511 bits) |
7 |
0x0D |
0x20 |
0x20 |
Enable PRBS Clock |
Notes:
1. To select PRBS31 instead of PRBS9, change Register Data 0x30 = 0x02 with mask of 0x03 in Step 6.
2. To only select Channel A, change Register Data 0xFF = 0x04 in Step 1.
3. To only select Channel B, change Register Data 0xFF = 0x05 in Step 1.
4. It has been noted in product testing that some pattern analyzers use an alternate PRBS9 polarity.
It is also feasible to configure this retimer to PRBS generator while operating in free VCO running mode with no input signal present. For this free VCO run PRBS generation mode we can target a VCO frequency via the selection of the cap count value (via channel register 0x08) but we cannot guarantee an exact frequency or PPM tolerance. Refer to the channel register write routine below for enabling VCO free run PRBS generator with VCO frequency ~ 10.3G
Enable the VCO free run generator
For DS110DF111, the settings below will produce a VCO free run frequency around 10.3G. As the resulting frequency will vary across process voltage and temp, the user may need to adjust reg_0x08 to tune the VCO frequency.
Table. Programming Sequence: PRBS Generator with Free-Running VCO @ ~10.3 Gbps, No Input Data Required
STEP |
REGISTER ADDRESS |
REGISTER DATA |
REGISTER MASK |
COMMENTS |
1 |
0xFF |
0x0C |
0xFF (write bits[7:0]) |
Enable Broadcast |
2 |
0x00 |
0x04 |
0x04 (only write bit[2]) |
Reset Channel Registers |
3 |
0x14 |
0x80 |
0x80 (only write bit[7]) |
Preset Signal Detect |
4 |
0x09 |
0x04 |
0x04 |
Override divider select |
5 |
0x09 |
0x80 |
0x80 |
Override VCO cap count |
6 |
0x08 |
0x06 |
0x1F |
Set VCO cap count to 06'h |
7 |
0x18 |
0x00 |
0x70 |
Select divider select to 000'b |
8 |
0x09 |
0x08 |
0x08 |
Override charge pump power downs |
9 |
0x1B |
0x00 |
0x03 |
Disable both charge pumps |
10 |
0x09 |
0x40 |
0x40 |
Override Loop-filter DAC |
11 |
0x1F |
0x12 |
0x1F |
Set Loop-filter DAC override value |
12 |
0x1E |
0x10 |
0x10 |
Enable PRBS Generator |
13 |
0x30 |
0x08 |
0x0F |
Enable Digital Clock - set pattern to PRBS9 |
14 |
0x09 |
0x20 |
0x20 |
Override Loopthru Select |
15 |
0x1E |
0x80 |
0xE0 |
Output MUX Select PRBS Generator |
16 |
0x0D |
0x20 |
0x20 |
PRBS Seed Load |
Notes:
1. To select PRBS31 instead of PRBS9, change Register Data 0x30 = 0x0A in Step 13.
2. To achieve a higher data-rate in Step 6 decrease VCO cap count value.
3. To achieve a lower data-rate in Step 6 increase the VCO cap count value.
4. To only select Channel A, change Register Data 0xFF = 0x04 in Step 1.
5. To only select Channel B, change Register Data 0xFF = 0x05 in Step 1.
6. With a free running VCO the actual output frequency will change with temperature and voltage. BERT is not recommended in this mode.
Regards,
Rodrigo Natal
HSSC Applications Engineer
Rodrigo:
Thank you very much for your reply and information. I greatly appreciate your help.
Sincerely
Sean