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PCA9306: circuit failing, question on series R to EN/VREF2

Part Number: PCA9306

My customer has asked about the PCA9306 application. He's guiding his team in China on this design.

See attached for application circuit from our datasheet.

The master is on 3.3V side and the Vref1=1.8V is enabled much later than the 3.3V on the master side.
The EN/VREF2 is controlled by master (3.3V) and could be present before Vref1 =1.8V.


The engineers indicated having problems with operation on applying power to the circuit and after RESET of the circuit, specifically on turning on Vref1=1.8V rail.
When they increased the value of the series resistor to EN/VREF2 to 10k, they reported that the failures stopped.


As I understand, the 200k series resistor is there to limit current that would “leak” from Vref2 to Vref1.

Could you, please, provide the recommendation for the resistor value limits and potential dangers of not restricting the current to Vref2?

PCA9306 application question.pdf*I read the latest data sheet for the part and understand the reason for the limitations, but need a formal response from TI to share with the design team.

  • Hey Robert,

    "Could you, please, provide the recommendation for the resistor value limits and potential dangers of not restricting the current to Vref2?"

    The limit would be (Vth+Vref)/128mA, if I assume Vth is 0.6v and Vref is GND then the absolute minimum resistance allowed would be 4.6 ohms.

    If you make the resistance lower, you will likely increase Vth because the Ids goes up Vforward/Vth goes up (my guess as to why 10k ohms works BTW). The pass FET between Vref1 and Vref2 is actually pretty strong (seeing as it can handle 128mA) so I don't expect damage to our device but now there will be a larger bias current into Vref1, if the net connected to this can handle the increased current then I don't see the problem. You will just have extra power consumption through Vref2 and Vref1.

    Thanks,

    -Bobby

  • Hi,Bobby and Robert

    I had a similar problem(1.8V I2C bus transform 3.3V):  The recommended Rcc to EN/VREF2 (200Kohm) is used on the circuit,I2C bus is abnormal. finally Rcc change to 50k, the bus is back to normal.

    According to the calculation formula on the TI datasheet, Rcc is greater than or equal to 7ohm, which is far from the recommended value. If 50k is adopted, will it do no harm to the pass FET?

    Your reply to Robert only said that it would increase the IC power consumption, which still makes me worry, Can you guarantee the robustness of the chip with minimum Rcc = a few ohms?

     

  • Hello user,

    "If 50k is adopted, will it do no harm to the pass FET?"

    The pass FET between Vref2 and Vref1 can handle up to 128mA of current based on the absolute maximum rating.

    "Can you guarantee the robustness of the chip with minimum Rcc = a few ohms?"

    This shouldn't be a problem as the FET between the Vref2 and Vref1 are large. as long as you do not over bias the voltage on the pin (past -0.5V or above 7V) and ensure that the clamp current is below 50mA in all cases then I believe it would be okay. [Keep in mind we also assume you are not violating the maximum junction temperature which would increase if you did lower the resistor you call Rcc]

    -Bobby