DS80PCI102: GEN detection returns wrong value

I’m using DS80PCI102 for driving a custom digital link (Xilinx Aurora), working on 3.125 GHz. We are using pin configuration to force DS80PCI102 into GEN1/GEN2 mode (among other things), which previously caused content of register 0x11, CH A DEM Control, to be 0x80 (we use 0 dB settings, and read GEN1 detected signal rate). On another iteration of the board, we noticed that content of this register changed to 0xE0, i.e. that we get GEN3 signal rate, detected by DS80PCI102. This is a wrong value, but furthermore it should be impossible – we use RATE pin connected to GND over 1kOhm, i.e. only GEN1 and GEN2 settings should be possible. On the other side CH B DEM reads expected value, 0x80. CH A is driven from connector, CH B by Xilinx FPGA. Could you please tell us if this is expected behavior, or what could cause this?