DP83822I: DP83822I loses data package

Hi team,

Add more detail about the test. The interface between DP83822I and  MAC is RGMII. During the 24hours operation, if there's any data package lost event or link down event happening, the laptop will record it respectively. After the 24 hours test, when we check the record, we found that the data package lost event happens 7~8 times and link down event happens 0 times which means the link is always good during the 24 hours.

Then we tried reverse loopback test: use a laptop to send 10000 data package to MAC. In theory, when a package arrives at MAC interface, it will not only be loopbacked to laptop but also be transmitted to MAC. After the test, we found that laptop receives all the 10000 packages that are looped back. But MAC only receives 9998 data packages. So it seems the data lost happens on the RGMII interface.

So could you please help advice what may cause data lost on RGMII interface while the link status is always OK.

Best regards,

Wayne

Hi Wayne,

Good debug to find out where the problem location is.

Let me know the following :

1. Is the data packet conent random? Or is it of a fixed pattern?

2. What is the value of register 0x0017? Are they delaying the rx_clk in phy or MAC? Are they delaying the tx_clk in phy or MAC?

I am checking the robustness of Rgmii data transfer timing here from MAC to phy and phy to MAC

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Regards,

Vikram

Hi Vikram,

Thanks for your reply. Please see my input for your question:

1. Is the data packet conent random? Or is it of a fixed pattern?

All the data packet have the same content.

2. What is the value of register 0x0017? Are they delaying the rx_clk in phy or MAC? Are they delaying the tx_clk in phy or MAC?

Customer writes 0x1249 to reg0x0017 in the initialization process.

Please help check if the configuration is related to the packet lost issue.

One more question about the RGMII interface. The RGMII interface in DP83822IRHBR is version 1.3 or version 2.0? These 2 different versions have different logic level. So customer wants to confirm the version. Thanks.

Best regards,

Wayne

Hi Wayne,

Can we measure the tx_clk (input to phy) frequency and rx_clk (output to phy) frequency and see what is the frequency difference between them? May be some fifo in phy's data path is over flowing after some time.

Also I dont know the changes in version 2.0 vs version 1.3. Can you tell me what is the logic level in version 2.0 then I can tell you whether 811 supports that or not.

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Regards,

Vikram

Hi Vikram

 For the RGMII difference between version 2.0 and version 1.3, I only know there's some difference on the logic level but I don't know too much detail about it. Can you help check within Ethernet BU team and help get the answer? Or maybe design team may have the answer. Hope you can help on this. Thanks.

Best regards

Wayne

Hi Wayne,

822 supports both 2.5V and 1.8V VDDIO if thats what customer is referring to as the difference.

Were you able to find out the clock frequencies I asked to look at to debug the present issue?

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Regards,

Vikram