TPS65988EVM: VIN_3V3 & P5V power supplies for the self-powered device/hub

Hi Adam,

Thanks for your prompt response.

Q1 - 

a. You are related to 65987D when I will use TPS65988. Should it be the same?

b. If I will need to add an external regulator P3.3V for some peripherals, that will be supplied from PP_HV1&PP_HV2=SYS_PWR=5V.  Do I need to supply  VIN_3V3 input in this case from the P3.3V or it can stay connected internally to VBUS?

c. Could you please clarify the spec note below? May it impact my configuration, when HUB have to charge the phone over J1 connector (Source mode) and charger connected to J2 (Sink mode).

The TPS65988 specification (page45, table 10) notify that - (1) LDO_3V3 may be generated from either VIN_3V3 or VBUS. If LDO_3V3 is generated from VBUS, TPS65988 ports only operate as sinks. Please confirm? 

Q2 -

Your answer does not clear, in case it's a self-powered HUB. What should be IN and OUT for this 5V backup regulator?  Also, the output voltage will be less than 5V, because I will use only 5V PD power profiles.

Q3 - 

During our phone conversation, Eric notified that the PD controller can provide some GPIO to wakeup MSP uC and inform that the charger is connected to J2 or phone to J1. Maybe some status register changing may create this type of interrupt. Can't find it in the spec.

Thanks

Vitaliy

Hi Adam,

Thanks, I would like only to confirm my understanding:

Q1 - 

Both options can allow the source PD operation (supply power to the connected phone when the external charger is connected to another PD port):

External VIN_3V3 power supply (even it still powered from the same PPHV1&2&SYS_PWR=5V, but not powered internally) OR the ‘DBfg’ Command from external uC is used to clear the dead battery flag. 

Q2-

Do you mean that an external Boost regulator 5V can be used between PPHV2 and PPHV1 to compensate for the voltage drop on the internal power path (30 mOhm max)? VBUS2-> PPHV2 -> Boost5V ->PPHV1 ->VBUS1 ? For the PD contract of 1.5A in our case, it's only a 50mV drop? Does it still significant and may impact HW design? 

Q3-

Could you please explain the comment of 0x5C register,  GPIO Configuration (4) is RO- READ ONLY?

(4) These registers are used by the TPS6598x Application Customizer Tool to properly configure the device. Modifying these registers directly is not supported by TI. 

What does it mean directly? Is it directly, when controlled by external uC over the I2C? 

Can I change this register setup in the debug mode through the Application Customizer Tool in Serial Flash, then reprogram PD Flash IC. After that restart my device in application mode with new Serial Flash content for this register?

Thanks, Vitaliy 

Hello Vitality,

Q1

You will need to do both. You will need to supply 3.3V to VIN_3V3 AND clear the dead battery flag using the DBfg command

Q2

Yes that would be the correct placement of the Boost. It may not be needed in this application but depending on the length of the cable and the total voltage drop from the source connected to VBUS 2 all the way to the connected device on VBUS 1, the drop could be more. Up to yo in your design how you would like to account for that or not worry about it. Is there a specific reason though why you are limiting it to only 5V? Since you have a PD controller, you could negotiate 20V contracts on both ends, and allow for charging of laptops as well as phones.

Q3

You can not change the configuration of the GPIO's once the TPS65987D has loaded the patch bundle from the external SPI flash or host EC. You can only change the GPIO configurations using the Application Configuration tool when generating the patch bundle to either load via flash or EC

Hi Adam,

Q1 - closed

Q2 - Thanks for sharing your concerns. Yes, the advantage of full PD profiles support is clear.

Our device should be ultra-small and thin. Therefore, support of high voltage PD profiles will require to implement VAR_DC2DC power supply with a big and high input/output filters.

We will check the option to use only 5V & 9V profiles, in case of a big voltage drop from 5V source. Can you recommend me some small buck regulator to support these two profiles?

Q3 - Let me please confirm my understanding. I will keep the FTDI SPI interface connection for my Proto1 in order to have the external connection to serial Flash with Application Configuration tool to adjust and update the patch bundle (flash SW/macro). The next regular PD controller power-up process will upload the NEW patch bundle from the external SPI flash with a new GPIO configuration. Is it correct?

Where can I find the "default" GPIO's 0-22 configuration (register 0x5C) for the TPS65988 current patch bundle on EVM?

Q4 - Safety certification IEC 62368-1 and single fault condition testing for TPS65988 configuration.

Under normal conditions, all high power PD contracts should start at 5 V and then transition to a higher voltage. However, there some devices that are not compliant to the USB Type-C and Power Delivery standards and could have 20 V on VBUS. This could cause a 20-V hot plug that can ring above 30 V. Adequate design considerations are recommended below for these noncompliant devices.

Do I need to consider the usage of high voltage input range (>30V) regulators powered from SYS_PWR, wherein my case the SYS_PWR is limited by 5V?

As I know, PD controller adjusts the internal OVP level to the high PD contract defined in a patch bundle. So, in my case will limit it by 5V. The second option if patch bundle will not be correct loaded or corrupted - in this case, I believe the PD controller will not allow the internal power path at all. The third option, when the internal power path will be shorted/damaged inside the chip and then not compliant VBUS power supply 20V will be connected? 

Thanks

Vitaliy

Hi Adam,

Thanks for your clarification. I have another question related to FRS. Please refer to my design configuration configuration.ppt enclosed early.

1. Could you please clarify the main design target to use the External power path together with internal?

2. We plan to use only the internal power path when PPHV1=PPHV2=SYS_PWR=5V and limited to 5V power contract only.

In my case, the BUS powered HUB is connected to the phone J1 connector and it provides the VBUS power to the HUB.

 2a. Now,

the external charger is applied to J2. The MSP uC is got this event, negotiates the power contract, and allow internal power path

VBUS2=> PPHV2, TOGETHER with VBUS1=>HVPP1 coming from the phone.

Does it possible to use the "ideal diode" power path configuration of TPS65988 in this case and supply the SYS_PWR from both sources?

Does its normal mode of operation (sink) when both PD controllers are in the sink mode and when both VBUS1 prom the phone & VBUS2 from the external charger are available, and SYS_PWR is a SUM of power from both PD1&2 in sink mode?

Of cause, Immediately after that, MSP uC will request the PD1 controller to sent PRS requests to the phone and will start source the phone charging.

 2b. The external charger connected and sourcing the phone charging VBUS2 => PPHV2 = SYS_PWR = PPHV1 => VBUS1

The user will detach the external charger from the PD2 controller and J1 connector. The VBUS voltage will start to drop to 0V

Does the PD1 controller will activate a fast role swap request by enabling the R_FRSWAP to pull down on the connected

CC pin to the phone automatically or MSP involvement is required?

Now, 

If the phone supports the fast role swap and my SYS_PWR (has big capacitor bank) will not be dropped quickly below 4V and reset my HUB within 150us

switching the phone sink to the source?

If my phone does not support the fast role swap, the PRS will take the seconds. TPS65988 ceases operating as the source and begin operating as a sink

As a result, my SYS_PWR will be dropped below 4V and reset the HUB. 

Am I able to keep my HUB out of reset by putting a big capacitor bank on my SYS_PWR domain and trying to minimize the HUB current drain by putting all consumers under the LPM by MSP?

Thanks

Vitaliy

Hello,

It seems that you have a lot of questions on the base architecture and behavior of FRS. I recommend reading the following documents as they should help guide you in the right direction.

http://www.ti.com/lit/wp/slyy147/slyy147.pdf?ts=1588078427383

http://www.ti.com/lit/an/slvae20/slvae20.pdf?ts=1588078459758

Hi Adam,

Thanks, I will review the documents in details.

Could you please answer my general questions meantime?

1. Could you please clarify the main design target to use the External power path together with internal?

2. Will the usage of both power paths be still relevant, if in my design PD1 controller is connected to the smartphone which is usually shared sink/source operation over the same VBUS line?

3. Can I meet all PD3.0 (FRS) requirements only with the internal power path?

4. I am training to understand how the charger disconnection event from the PD2 controller will be communicated to the PD1 controller connected to the phone?

I can see that reg 0x42 can enable the FRS feature in both. So, Will the PD1 controller wait for PPHV1=PPHV2=SYSPWR dropped below vSafe5V?

Only after that PD1 will initiate the FRS event with the phone and stop the sink power for the charging?

Can/Should the external MSP uC be involved and "help" in this process to get INT from PD2 for the charger disconnection and setup PD2 controller to start the FRS request to the phone?

Regards

Vitaliy

Hi Adam,

Can I use the Plug Event GPIO on the PD2 controller side for the charger port disconnection event and connect it to another GPIO on the PD1 controller side for the "FRSwap Input Event" that connects to the phone. Would it allow me to send the FRSwap message earlier as possible when the charger is only disconnected and not wait that PPHV will be dropped below the vSafe5V threshold?

Regards

Vitaliy

Hello,

I would not recommend doing this as it does not take into account devices that are not enabled to be a sink and will reject a FRS. Would recommend to use the  vSafe5V threshold.

Hi Adam,

Can you please answer my previous questionד also from May 3, 2020 7:51 PM?

Regards

Vitaliy

1. Could you please clarify the main design target to use the External power path together with internal?

That is up to the designer. Typically, one power path is used as the source and the other is the sink. Most customers use the internal power paths as the source paths and the external paths as the sink paths.

2. Will the usage of both power paths be still relevant, if in my design PD1 controller is connected to the smartphone which is usually shared sink/source operation over the same VBUS line?

From a power architecture perspective, it is probably easier to have one power dedicate to sourcing and the other for sinking for both ports

3. Can I meet all PD3.0 (FRS) requirements only with the internal power path?

Please follow the architecture used in the app note

4. I am training to understand how the charger disconnection event from the PD2 controller will be communicated to the PD1 controller connected to the phone?

This is up to your system design on how you want to handle disconnect event

Hi Adam,

#4. Could you please help to understand if there is any built-in HW/SW mechanism between PD2 (Charger only port) and PD1 (Phone sink/source)

based on the HW vSafe5V threshold? to identify the charger disconnection on the PD2 side and start FRS action on the PD1 side versus the phone to switch from old sink to New source?

Does my external MSP controller have to be involved here, to get the charger disconnection on PD2 and inform/setup PD1 for FRS enable/start?

Thanks

Vitaliy

No this is the responsibility of the connected device to detect that a fast role swap event is occurring, and send out the request (if it supports it), then the PD controller will automatically switch over to sink instead of source once the connected device makes the transition