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DS90UB962-Q1: REFCLK 1.8V design

Part Number: DS90UB962-Q1

Hi Sir,

For the DS90UB962 we’re feeding the VDDIO pin by 3.3V. (Setting GPIO and others to 3.3V level)
And using a 1.8V Oscillator as reference clock. But could it driving by 1.8V’s clock?(while the VDDIO set to 3.3V, but I saw the typical is 1.2V in datasheet as below)

  • Hello,

    I just want to make sure I understand the question.  Are you asking if the output of the oscillator will work with the 962 while VDDIO is 3.3V?  It appears to me that max output voltage low will be is about 0.18V and the lowest output voltage high will be is 1.62V.  That means that the smallest the peak to peak voltage can be is about 1.44V which falls within the margin given in the 962 datasheet.

    Regards,

    Nick

  • Hi Nick,

    Yes, the VDDIO is 3.3V.

    So the Vpp 1440mV is not enough(or too margin)?
    But the typical amplitude value is 1200mV. And it is more than the minimum value 800mV.

  • Hi again,

    Have you tested and it isn't working? Or are you simply asking if the oscillator waveform will work?

    It looks like the oscillator will put out a waveform of 0 to 1.8V which is within the refclk oscillator spec.  Therefore should work with the 962.

    Regards,

    Nick