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TCA9800: some questions about TCA9800

Part Number: TCA9800
Other Parts Discussed in Thread: TCA9803

Hi team,

My customer wants to use the TCA9800 in the system, but we have several questions below.

1. TCA9800 B side connect to INTEL FPGA GPIO to simulate i2c. The gpio pin leakage current within -80uA ~80uA. below our spec below. It seems ok, correct?

But the waveform is a little weird, we have checked the communication, no issue here.

2. For the slew rate(rise/fall time) requirement, it's for the input signal, correct? whether it's too fast for the 100khz I2C signal? if it's not the standard, whether we have requirement for the rise/fall time?

3. Whether the requirement below is A side or B side? In my opinion, it should be B side, correct? it's > or < 150ohm. In my opinion, it should be <150ohm, correct?

Thanks.

  • Frank,

    Can you share a block diagram of the I2C bus or the schematic?

    1. The waveform does seem a bit weird to me as well. I'm not sure if the resolution/sampling of the scope is bad or if the bus looks like it is too heavily loaded. The rise times seem slow once they reach a certain point and the fall times seem a little off. TCA9800 has the weakest drive strength of the TCA980x family. Maybe you can switch this device with the TCA9803 (the strongest of the family) and see if the rising edges look faster/better.

    2. Those rise and fall times are about the TCA9800 device under the loading conditions mentioned in the datasheet not the required rise/fall time of the system.

    3. The 150ohm impedance max is what we spec. This means we require any master/slave/I2C device to have pull down impedance of less than 150 ohms. This should be okay for all I2C devices due to the I2C spec: 0.4V at IoL of 3mA = 133.33 ohms so all I2C compliant devices should work with our B side of our device.

    -Bobby