DP83867IR: RESET_n and the Power Sequence

Darren (FAE)

Part Number: DP83867IR
Other Parts Discussed in Thread: DP83867IS

Question regarding the power sequence and the RESET_n pin.

It looks like the RESET_n pin has a weak pullup (9k ohms), but to which rail is this pulled up?

Is it pulled up to the VDDA2P5, VDDIO, or VDD1P0? (I am skipping VDD1P8, as this is only optional for three-supply mode)

I ask this because the DS says for two-supply mode there is no recommendation on which power supply is ramped first/second, or how much delay there is between the two rails ramping. Yet there could be a situation where the RESET_n pin goes high while the voltages are still ramping, maybe causing some issues?

The engineer I am talking to believes the VDD1P0 rail needs to go high before, or at the same time, the RESET_n pin goes High. Is this understanding correct?

Also, is this true for DP83867IS device as well?

Thanks & Regards,

Darren

over 5 years ago

0 Geet Modi over 5 years ago

TI__Mastermind 26320 points

Hi Darren,

RESET_N shall be on the VDDIO power rail.

Regards,

Geet

0 Darren (FAE) over 5 years ago in reply to Geet Modi

TI__Expert 5483 points

Geet,

Thanks for the reply. Quick follow-up:

If the RESET_n is pulled to VDDIO rail, then would VDDIO ramping first turn on the device before 1P0 was applied?

Should 1P0 be applied first? (Datasheet says no timing requirements for two supply mode, and three supply mode only specifies timing for 1P8.)

0 Geet Modi over 5 years ago in reply to Darren (FAE)

TI__Mastermind 26320 points

Hi Darren,

In case of two supplies, ramp shall be completed within 200 ms as given in power up timing. However I recommend applying all supplies together.

Regards,

Geet

0 Darren (FAE) over 5 years ago in reply to Geet Modi

TI__Expert 5483 points

Hi Geet,

Could you clarifiy please?

7.6 Power-Up Timing in the datasheet mentions 200ms as "post power-up stabilization time" and "hardware configuration latch-in time".

So this is T1 and T2 for Figure 1 "Power-Up Timing". As long as all rails are ramped within this time 200ms frame, there shouldn't be any issues, correct?

0 Geet Modi over 5 years ago in reply to Darren (FAE)

TI__Mastermind 26320 points

Yes, that's correct. However I recommend ramping all supply together.

Regards,

Geet

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DP83867IR: RESET_n and the Power Sequence