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SN65DSI84: SN65DSI84 Register error

Part Number: SN65DSI84

Hi Team,

My customer is using SN65DSI84 for MIPI to LVDS. When they use DSI Tuner, they get some register errors shown below in red.

DSI Tuner Configuration:

Register errors shown below in red.

Could you help explain these errors?

I also CC customer so we can discuss in this post.

Thanks and regards,

Yang

  • Hi Yang,

    There are a couple of things wrong with those settings:

    1. Since this is a single DSI to dual LVDS application, the horizontal pixel and line parameters on the DSI side should be double that of the horizontal pixel and line parameters on the LVDS side.

    2. The DSI CLK frequency in the settings has a value of 584 MHz. The maximum frequency the DSI84 supports if 500 MHz. To calculate the correct frequency, you should use equation (2) in this application note: http://www.ti.com/lit/an/slla356/slla356.pdf except you need to multiply the equation by 2 since there are 2 LVDS clocks.

    In regards to the original question, there are no register errors here since those particular registers are for the test pattern. They will show up as 0 unless you enable the test pattern.

    Regards,

    I.K.

  • Hi Anyiam,

    Thanks a lot. I have already customer to fix it.

    best regards,

    Yang