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DS90UB947-Q1: Pattern Generation Configuration Options

Roy Chou1
Genius 16325 points
Part Number: DS90UB947-Q1
Other Parts Discussed in Thread: ALP

Hi Team,

I have some questions about Pattern Generation Configuration Options in APP note(SNLA132)

Does CNTL mean control signal (HS/VS/DE)?

Configuration.1

1. Could I only use External PCLK but using internal CNTL(947 generated internally)

2. How could I verify the PCLK of SerDes? i mean when I use external 150 MHz, I'm not sure if this 150MHz is from external CLK or internal generated.

Configuration.2

1. Does it mean we use PCLK CNTL which is generated by Serializer.

2. What is the maximum of of Pattern generation w/ internal clock?

3. Could I use the dual link in the configuration?

4. How could I set dual link in this configuration

Regards,

Roy

  • 0
    TI__Guru** 103215 points

    Hello Roy,

    CNTL signals mean DE/HS/VS, correct. For config 1 it is possible to use internally generated control (timing) signals and just the PCLK from the external input. The ALP GUI for 947 shows the detected PCLK frequency in the main tab and this information comes from register 0x1F. Internal PATGEN can not generate a 150MHz clock. It is always < 100MHz based on the "N" divider setting. 

    For config 2, the serializer is generating both the PCLK and the control (timing) signals internally. For 947 the internally generated clock is based on a ~200MHz base clock and then it is divided by the "N" setting which is programmed. N must be >= 2 so the highest PCLK for internally generated PATGEN is ~100MHz 

    Single/Dual FPD-Link can be set independently of the PCLK rate as long as the PCLK rate can be supported over single FPD-Link. For 947 the max PCLK for single link mode is 96MHz. Single/Dual mode is forced with register 0x5B, otherwise it is automatically detected based on the deserializer partner and the PCLK rate. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    TI__Genius 16325 points

    Hi Casey,

    Could we use dual link and external PCLK(150MHz) in ALP-Pattern generation page?

    Regards,

    Roy

  • 0 in reply to Roy Chou1
    TI__Guru** 103215 points

    Hello Roy,

    Yes, the ALP Pattern Generation tab controls the clock mode but it does not control the Dual/Single FPD-Link setting. 

    Best Regards,

    Casey