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TMDS181: DDC infomation &

Part Number: TMDS181
Other Parts Discussed in Thread: TMDS171

Hi,

Our customer has 2 questions.

Q1.
I think TMDS181 is monitoring slave address A8 / A9 of DDC. Is there any other slave address that this IC is monitoring?
Customers say that the information is necessary to control the FPGA...
Q2.
According to this document, if we write 0 to sub address 0xFF, it becomes page0, and if we write 1, it becomes page1.
When I look at other threads, they dump page1 and see specific subaddresses.
I think that page1 has many statuses necessary for debugging and settings of the test form described in this document.

Is this the only document for page1?
Customers say they don't understand because they don't have detailed status information.

Can you give me additional infomation about page1 (Table, Map, Descliption, etc.)?
Best regards,
Hiroshi
  • Hiroshi-san

    Q1: As part of discovery, the source reads the sink’s E-EDID information to understand the capabilities of the sink. Part of this read is HDMI Forum Vendor Specific Data Block (HF-VSDB) MAX_TMDS_Character_Rate byte to determine the data rate supported. Depending upon the value, the source writes to slave address 0xA8 offset 0x20 bit1, TMDS_CLOCK_RATIO_STATUS. The TMDS181 snoops this write to determine the TMDS clock ratio and thus sets its own TMDS_CLOCK_RATIO_STATUS bit accordingly. But the FPGA is the source that controls the read of the sink EDID, what information do they need to control the FPGA from TMDS181?

    Q2: Page 0 register information is sufficient for device operation. Page i registers are for debugging purpose only. To request Page 1 information, please contact local TI office and request an NDA before we can share the page 1 register information.

    Thanks

    David

  • David-san

    Thank you for your quick reply.
    I received these two questions from the customer because there is no output from TMDS181.
    Before asking these two questions, I thought this question didn't help them solve the problem, but I couldn't refuse the request for this post. sorry.

    In order to get the correct output from the device, we first checked if the hardware was designed properly.
    Since the FPGA input does not match the TMDS181, we have shown the correct pull-up method for AC coupling.


    Given that the hardware is properly designed, are the data sheets and application notes enough information to control the device on the sink side?

    TMDS181 and TMDS171 Configuration Guide

    https://www.ti.com/lit/pdf/slla466

     

    TMDS181 Schematic Checklist

     https://www.ti.com/lit/pdf/slaa893



    But customers say they need more information.
    What is your opinion?

    Best regards,

    HIroshi

  • I made a mistake in pasting the output circuit.
    We introduced this circuit.
  • Given that FPGA is AC-coupled, I would recommend the customer switch from TMDS181 to DP159.

    The block diagram you showed is for a DC-coupled HDMI connected to a AC-coupled input, which you would then need an external 50ohm termination. It will not work for TMDS181.

    Thanks

    David

  • I may have made a mistake.
    In the customer's case the output of this TMDS181 needs to be AC coupled, does the TMDS181 not work?
    Best regards,
    Hiroshi
  • Hiroshi-san

    In this case, you need to have external 50ohm termination to 3.3V as shown in the block diagram of your last message and as described in the TMDS181 schematic checklist.

    Thanks

    David

  • David-san

    Thank you for your quick reply.
    I will explain this information and request an evaluation.
    Best regards,
    Hiroshi