Other Parts Discussed in Thread: TMDS171
Hi,
Our customer has 2 questions.
Customers say that the information is necessary to control the FPGA...
According to this document, if we write 0 to sub address 0xFF, it becomes page0, and if we write 1, it becomes page1.
I think that page1 has many statuses necessary for debugging and settings of the test form described in this document.
Is this the only document for page1?
Customers say they don't understand because they don't have detailed status information.
Can you give me additional infomation about page1 (Table, Map, Descliption, etc.)?