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TL16C754B: Timing requirement.

Guru 11265 points
Part Number: TL16C754B


Hi team.

I'd like to know about timing requirements when clock is 48MHz.

When the clock using 48MHz, it is difficult for us to secure T8s and T8h.

Could you tell me your advice how to deal with it?

Sincerely.

Kengo.

  • Hey Kengo,

    Can you elaborate on what you mean by: "When the clock using 48MHz, it is difficult for us to secure T8s and T8h."

    I assume you are having some kind of signal integrity issue with sending and receiving data???

    "I'd like to know about timing requirements when clock is 48MHz."

    What baud rate are you using?

    Have you tried sending 0xAAhex and measuring the bit period on TX then compare it to a bit period on RX to see the bit difference?

    Thanks,

    -Bobby

  • Hi Bobby.

    I refer to the following in the datasheet.

    When XTAL1 is 48MHz(2nSec), It was entered 10 clocks in 20nS.

    I think it is impossible to put a fall during 20nS.

    How should I deal with it?

    Sincerely.

    Kengo.

  • Hey Kengo,

    T8s and T8h are just the minimum values that need to be met inorder to get 100% efficiency in reading/writing continuously. If you were to just pull IOW/IOR low and then high in for example 1us instead, you would still be able to read/write with a 48MHz clock but you would just be much slower and not be 100% efficient. 

    -Bobby

  • Hi Bobby.

    Thank you for your reply.

    Does that mean you don't need to synchronize with the clock?

    In other words, is it 100% efficient if it(IOW/IOR low and then high) secures 20nS?

    Sincerely.

    Kengo.

  • Hey Kengo,

    "Does that mean you don't need to synchronize with the clock?"

    Yes you are correct. Syncronizing with the clock would make using this device very difficult at high speeds.

    "In other words, is it 100% efficient if it(IOW/IOR low and then high) secures 20nS?"

    I'm not sure I follow what you mean here.

    -Bobby