• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 33 subscribers
  • Views 394 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB947-Q1: How to set 947 Pattern output ?

user6328875
Prodigy 30 points
Part Number: DS90UB947-Q1
Other Parts Discussed in Thread: ALP

Hi ti team,

     1,How to set 947 pattern output,need 1920*720 25fps,

     2,if uses 940 pair to 947,without any input data in 947 side, just on power and set pdb to high both on 940 and 947 side ,can they lock?

     3、if 940 set to radio in 1920*720 25fps，just set 947 pattern out used same radio 1920*720 25fps，can 940 see the pattern image from 947 ？

thanks！！

  • 0
    TI__Guru** 103215 points

    Hello,

    For #1 can you please provide the full panel timing parameters including PCLK value and sync/porch blanking widths? 

    For #2, yes without any input source 947/940 can lock when powered up. The link will be driven using internally generated clock at ~33MHz

    For #3 can you explain what you mean by radio? We are not sure how to understand your question

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    Prodigy 30 points

    Hello，ti team：

    we have found why can not lock between 947 side and 940 side because 947 side‘s  input is not pair to 940 side。

    Now we changd 947 side is 1920*720,25fps，27Mhz，also 940 side is setted at the same is 1920*720,25fps，27Mhz，they can lock。

    But now we have a problem ，on 940 side，we can't see the image posted from 947 side。And on 947 side，we want to set pattern mode

    to test pattern mode is ok？

    eg:on 947 side,used 1920*720,25fps，27Mhz,extern time,the following pattern mode register setted  is right?

    timing value is HBP: 23,HFP:33,VBP:4,VFP:15,HPW:8,VPW:2,CLOCK:27MHZ

    please help me check.

    {I2C_ADDR_DS947, 0x66, 0x07, 0},
    {I2C_ADDR_DS947, 0x67, 0x80, 0},
    {I2C_ADDR_DS947, 0x66, 0x08, 0},
    {I2C_ADDR_DS947, 0x67, 0x07, 0},
    {I2C_ADDR_DS947, 0x66, 0x09, 0},
    {I2C_ADDR_DS947, 0x67, 0x2D, 0},//1920.720
    {I2C_ADDR_DS947, 0x66, 0x04, 0},
    {I2C_ADDR_DS947, 0x67, 0xC0, 0},
    {I2C_ADDR_DS947, 0x66, 0x05, 0},
    {I2C_ADDR_DS947, 0x67, 0x57, 0},
    {I2C_ADDR_DS947, 0x66, 0x06, 0},
    {I2C_ADDR_DS947, 0x67, 0x2E, 0},//ACTIVE H AND V
    {I2C_ADDR_DS947, 0x66, 0x0C, 0},
    {I2C_ADDR_DS947, 0x67, 0x17, 0},
    {I2C_ADDR_DS947, 0x66, 0x0D, 0},
    {I2C_ADDR_DS947, 0x67, 0x04, 0},

    {I2C_ADDR_DS947, 0x66, 0x0A, 0},
    {I2C_ADDR_DS947, 0x67, 0x08, 0},
    {I2C_ADDR_DS947, 0x66, 0x0B, 0},
    {I2C_ADDR_DS947, 0x67, 0x02, 0},
    {I2C_ADDR_DS947, 0x66, 0x0E, 0},
    {I2C_ADDR_DS947, 0x67, 0x00, 0},

    {I2C_ADDR_DS947, 0x65, 0x0c, 0},
    {I2C_ADDR_DS947, 0x64, 0x05, 0},

    Thanks

  • 0 in reply to user6328875
    TI__Mastermind 25955 points

    Hi user6328875,

    Taking the 947 out of the equation for the moment:

    Are you able to see an image displayed using the PATGEN feature on the 940?  If not, please try this first to ensure the 940 is configured properly.

    With the 940 in a known good configuration, connect the 947 and attempt with the patgen sourced from the 947.

    Please let me know if the issue persists after these steps.

    Sincerely,
    Bryan Kahler

  • 0 in reply to Bryan Kahler
    Prodigy 30 points

    Hi ti team:

    1#  we can't see an image displayed using the PATGEN feature on the 940.

    2# can you tell me how to set PATGEN feature on the 940?i can't make sure .

    3# if set PATGEN feature on 947 side,can it post image to from 947 to 940 with FPD-Link  line ? if can not auto,how to set the register both on 947 side and 940 side?

    4#940 side lock pin dc level ，just few days when is locked，dc level is 3.4v，high always。But now it changed to 2.4v，soft side not changed ，hardware side not changed，just

    plus in and out FPD-Link cable。we confuse why lock pin dc level is changed to 2.4v？

    Thanks！

  • 0 in reply to user6328875
    TI__Mastermind 25955 points

    Hi user6328875,

    Yes, prior to analyzing the link, lets make sure Patgen works from the device to the display.  Set PATGEN first on the 940 and then enable it.  This can be achieved using the Pattern Generator tab in ALP.  The Pattern Generator is configured with basic timings for common panels.  If these timings are not suitable for your display, you can create a custom timing using the values from your display datasheet.

    Sincerely,
    Bryan Kahler