This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TUSB2077A: PCB traces for USB2.0 design, guides for polygon pour around differential lines.

Part Number: TUSB2077A

Hi

I am designing a USB-hub that has many USB traces. I followed some guidelines online and read forums. Based on my understanding of a 4-layer stack-up, one of the best set-up I chose is 8 mil trace space and 10 mil trace width. I made the layer under the Top Layer as the ground plan. Is it ideal?

My main question is: Should/could I have polygon pour on the top layer (the same layer is differential pairs)? I searched a lot and did not find any note about the impact of the polygon on the impedance.

This image is an example of a connection:

Thanks

  • Hello Amirhossein,

    Your PCB stackup sounds good.  You should check the impedance of the trace width / spacing with a PCB toolkit or with your board shop.

    Polygon pours or ground pours / ground fills can be implemented but they are not as important at the ground plane below the USB traces.  One note about the ground fills is that if your board is crowded and the fills start / stop along the traces (lots of islands)  they can actually negatively impact the signal.  For USB Full Speed 12 Mbps traces this isn't going to have a huge impact either way, USB is pretty robust.

    Regards,

    JMMN