DS90UB948-Q1: Margin Analysis Program test result

Hello Roy,

When you run this test is there a PCLK provided to the remote serializer? For MAP to work correctly, the link my be running with the normal video PCLK, not the always on clock which drives the link when there is no video/PCLK applied to the SER.

Best Regards,

Casey 

Hi Casey,

I have connected the PCLK to 947 but not connect the video signal. Does below test result make sense? 

Thank you.

Regards,

Roy

Hello Roy,

What cable type and length is used between 947 and 948 for this test?

Thanks,

Casey 

Hi Casey,

Sorry for forgetting attach cable information.

Cable : STP/around 1 meter

dual pixel mode / dual link mode / PCLK = 75MHz

Regards,

Roy

Hi Casey,

Excuse me. Do you have any comments?

Regards,

Roy

Roy,

Thanks for all the ALP screen captures.

What's your hardware setup? Are you using our EVMs? Could you describe and also attach a photo (if ok) of your setup? 

I was looking at some old Map results I had captured with our EVMs (948/949) for 1m and I don't see it all green as you have. See below

Above result is by running Margin Analysis Script. You can find the script as part your ALP installation folder (PreDefScripts).

I can later post some results with ALP also but I think your problem may be connected to some setup issue. Please let us know your hardware setup.

Thanks,

Vishy

Hi Vishy,

I used the custom board which is produced by my customer. I couldn't take a pic due to confidential.

The setup is showing as below and describe in text.

pattern gen with external PCLK(75MHz) - 947(dual pixel mode)-----STP/dual link(1 meter)-----948(dual output)-----------display

And ALP setup was showing as previous page. 

Regards,

Roy

Roy,

How is the custom board 948 I2C lines connected to ALP? Are you using USB2ANY or Aardvark module?

Margin Analysis is mainly a offline diagnostic tool meaning when we are running we don't want other initialization and MCU interactions that might interfere with MA code running. In your customer's custom board, is there some MCU managing the SERDES? 

Ideally we need just the following configuration for link margin analysis

PCLK (75MHz) --> 947 -- STP Link --- 948 --- USB2ANY --- PC (ALP)

Thanks,

Vishy

Hi Vishy,

Yes, it's typo. I don't use pattern gen. My setup is below.

PCLK (75MHz) --> 947 -- STP Link --- 948 --- USB2ANY(I2C) --- PC (ALP)

is there some MCU managing the SERDES?  NO.

Regards,

Roy

Roy,

Thanks for sharing your schematic. Please make sure the MCUs are not interfering with Margin Analysis. For this might have to shutdown (or keep in reset) the MCUs or disconnect the MCU I2C connection to 947/948.

Thanks,

Vishy