DS90UB954-Q1: Minimum pulse width for external frame sync

Ronen Shash

Prodigy 160 points

Part Number: DS90UB954-Q1

Hello,

I'm using 954 EVB and 953 which is on our device.

All 4 GPIO are assigned.

ExternalSync is attached to GPIO0.

The FrameSync configuration of 954 was done according to the datasheet so:

FS_CTL 0x18 is 0x80

BC_GPIO_CTL0 0x6E is 0xA

1. What is the minimum pulse width that has to be configured at the 954 side?

In addition, I would like to transmit frame sync when the source is the device itself (the device synchronize other devices). In that case, the 953 GPIO is input and 954 is output.

2. What is the minimum pulse width that has to be configured at the 953 side (back channel)?

over 5 years ago

0 Casey McCrea over 5 years ago

TI__Guru** 103215 points

Hello Ronen,

What operating mode are you planning to use for the 954/953? Synchronous mode or non-synchronous mode?

Best Regards,

Casey

0 Ronen Shash over 5 years ago in reply to Casey McCrea

Prodigy 160 points

Hello,

Both at synchronous mode.

0 Ronen Shash over 5 years ago in reply to Casey McCrea

Prodigy 160 points

Hello,

Both at synchronous.

0 Ronen Shash over 5 years ago in reply to Casey McCrea

Prodigy 160 points

Hello,

Both at synchronous.

0 Mandeep S over 5 years ago

TI__Expert 3390 points

Hi Ronen,

There's no min spec defined in the datasheet. We even provide an example of how to configure the internal frame sync to 10% duty cycle, so you should be okay to go as low as 10% in external frame sync.

Regards,
Mandeep Singh

0 Ronen Shash over 5 years ago in reply to Mandeep S

Prodigy 160 points

Hello,

Where can I find this example?

0 Mandeep S over 5 years ago in reply to Ronen Shash

TI__Expert 3390 points

Hi Ronen,

Please see section 7.4.27.2.1 in the 954 datasheet.

Regards,

Mandeep Singh

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DS90UB954-Q1: Minimum pulse width for external frame sync