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Given the typical application diagram bellow from the TCA9548A:
Would the following scenario:
cause any sort of problem or lead to a latch-up event?
Would having a 3.3V Logic HIGH on the SDA/SCL/RESET pins (via external pull-ups) cause any sort of problem or phantom powering of the device while it is being powered off?
Hey Alin,
Our device is powered off high impedance when there is no Vcc and also 5V tolerant.
This device will not back bias through any internal circuitry and power the device up while there is no power on Vcc through SDA/SCL/RESET.
The set up you described should be fine.
Thanks,
-Bobby