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Hello,
I've been trying to turn on a USB-C monitor from a DisplayPort source using TUSB1046EVM, but it doesn't work and either HPD or AUX is not functioning.
One thing I've found is that 1046_EN/CTL1 is stuck at 0v. I think it's just operating in USB3.1 only mode. I switched SW1 on and off, but it's always 0.
I'm supplying power by USB-B and keeping all jumpers as default.
Could you help me with this?
Thanks,
Jesun
Hi Jesun
Can you please try to power the EVM through the power jack (J14)?
The FLIP, CTL0, CTL1, and HPD should be driven by the PD controller base on the CC communication between the TUSB1046 EVM and the Type-C monitor. If you are seeing them driven low, then this would potentially indicate a CC communication failure between the EVM and the monitor. Have you tried both the Type-C normal and flip orientation? Do you have the ability to capture the CC communication log file?
Do you have a way to test the USB? I want to make sure the EVM is not damaged and functioning properly.
Thanks
David
Hi David,
When I supply 5V to J14 power jack, the board doesn't seem to be power on. The green LED (D2) is really dim and all the 3P3V TPs stay low.
And flipping orientation also didn't work. How can I capture the CC log file or test the USB? Could you let me know where I can find documents or something about it?
Thanks,
Jesun
Jesun
Please remove power from power jack J14 first since we will use USB Type B to supply power to the EVM.
Please connect a USB host to the EVM Type B receptacle, and a Type-C device to the EVM Type-C receptacle. The USB host should recognize the device in both the normal and flip position.
The FLIP pin will be driven low or high base on the Type-C orientation.
The CTL0 pin will be driven high for USB operation.
Thanks
David
Hi David,
Thanks for your answer, but unfortunately it's still not working. I connected my laptop to the EVM Type B receptacle, and if I connect a USB-C flash drive to the EVM Type-C receptacle then it's working well. But when I connect USB-C monitor, it's not turned on. Of course I connected DisplayPort source to the EVM too.
I tested with two USB-C monitors, one is the LG ultrafine and the other is my custom device. For the LG ultrafine (which is self-powered monitor), the laptop could detect it as a thunderbolt device but the monitor is not turned on. And for the other monitor (that's power should be driven by USB-C), its power is constantly on and off, like every 1 second. And I could see the CTL and FLIP pins go high and low according to it. Both two monitors work well when I just connect them to the laptop by thunderbolt directly.
Do you have any suggestion about something I can try?
Thanks,
Jesun
Jesun
1. For the LG UltraFine monitor, what is the state of FLIP, CTL0, and CTL1 for normal and flip orientation?
2. Please use a multi-meter and measure the voltage on AUXP and AUXN for the normal and flip orientation. AUXP/SBU1 voltage should be around 0.3V and AUXN/SBU2 should be around 3V.
3. Please pull CAD_SNK and HPD high and see if the video shows up on the monitor
4. Above steps assume TUSB1046 is in GPIO mode, any chance you have an I2C master so we can debug the issue in I2C mode?
5. Do you have a way to capture the CC and the AUX log file?
Thanks
David
Hi David,
Thank you so much for your feedback.
1. FLIP is low or high depending on the orientation. CTL0(AMSEL) is high, but CTL1(1046_EN) is always low.
3. CAD_SNK was already high. I applied 3.3V to HPD (J1) but nothing happened.
4. I switched the jumper JMP7 to 1KPU-I2CEN and connected Aardvark I2C adapter to J8. Is that right? What slave address do I have to access?
I've been still trying to do everything. Let me answer to your other questions anytime soon.
Thanks,
Jesun
Jesun
With CTL1 being always low, this would indicate that the PD controller did not enter into DP alt mode. We need to take a look at the CC log file to understand why we did not enter into DP Alt Mode.
For I2C address, please refer to section 8.5 of the datasheet. But the focus should be on understanding the CC communication between the EVM PD controller and the LG monitor.
Thanks
David
Hi David,
Thanks for you help. I got a USB PD analyzer and captured CC logs. Could you please look over it? Sorry if I'm uploading too much raw data here. I didn't want to miss anything I'm not familiar with.
1. This is a CC log between LG ultrafine and EVM.
m:s.ms.us Dur Len Role Message Data 0:02.111.012 PD 0:02.221.306 PD 0:02.321.758 627.000 us 10 B DFP/UFP [0]VDM:DiscIdentity 4F 10 01 80 00 FF F0 1D A7 5B 0:02.322.364 492.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:02.324.677 1.152.000 ms 26 B Cable [0]VDM:DiscIdentity 4F 51 41 80 00 FF C2 20 00 24 00 00 00 00 10 00 04 00 58 58 08 21 14 B3 BB 4D 0:02.325.814 497.000 us 6 B DFP/UFP [0]GoodCRC 41 00 BB 6C BB A8 0:02.327.109 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.327.848 499.000 us 6 B Sink:UFP [0]GoodCRC 41 00 BB 6C BB A8 0:02.331.809 630.000 us 10 B Sink:UFP [0]Request 42 10 00 00 00 12 0E EC 0B 60 0:02.332.640 497.000 us 6 B Source:DFP [0]GoodCRC 61 01 8F 78 38 4A 0:02.333.159 497.000 us 6 B Source:DFP [1]Accept 63 03 21 7B 00 96 0:02.333.866 499.000 us 6 B Sink:UFP [1]GoodCRC 41 02 97 0D B5 46 0:02.369.096 496.000 us 6 B Source:DFP [2]PS_RDY 66 05 51 2A 14 02 0:02.369.805 496.000 us 6 B Sink:UFP [2]GoodCRC 41 04 A2 A8 D6 AF 0:02.370.363 PD 0:02.380.557 632.000 us 10 B Source:DFP [3]VDM:DiscIdentity 6F 17 01 80 00 FF D6 C4 2B EE 0:02.381.293 499.000 us 6 B Sink:UFP [3]GoodCRC 41 06 8E C9 D8 41 0:02.385.353 1.039.000 ms 22 B Sink:UFP [1]VDM:DiscIdentity 4F 42 41 80 00 FF 3E 04 00 D4 00 00 00 00 79 03 4E 9A 33 3A 97 3F 0:02.386.368 496.000 us 6 B Source:DFP [1]GoodCRC 61 03 A3 19 36 A4 0:02.387.161 629.000 us 10 B Source:DFP [4]VDM:DiscSVID 6F 19 02 80 00 FF 59 D5 AE 43 0:02.388.006 502.000 us 6 B Sink:UFP [4]GoodCRC 41 08 89 E4 60 A6 0:02.392.065 904.000 us 18 B Sink:UFP [2]VDM:DiscSVID 4F 34 42 80 00 FF 01 FF 87 80 00 00 00 00 9E 73 6F 0F 0:02.393.052 499.000 us 6 B Source:DFP [2]GoodCRC 61 05 96 BC 55 4D 0:02.393.867 632.000 us 10 B Source:DFP [5]VDM:DiscMode 6F 1B 03 80 01 FF 1D D0 C9 98 0:02.394.597 498.000 us 6 B Sink:UFP [5]GoodCRC 41 0A A5 85 6E 48 0:02.398.671 767.000 us 14 B Sink:UFP [3]VDM:DiscMode 4F 26 43 80 01 FF 46 1C 00 00 52 A9 AF F8 0:02.399.635 499.000 us 6 B Source:DFP [3]GoodCRC 61 07 BA DD 5B A3 0:02.472.158 499.000 us 6 B Sink:UFP [4]PR_Swap 4A 08 42 3D 94 45 0:02.472.535 496.000 us 6 B Source:DFP [4]GoodCRC 61 09 BD F0 E3 44 0:02.473.276 499.000 us 6 B Source:DFP [6]Accept 63 0D 26 56 B8 71 0:02.473.874 502.000 us 6 B Sink:UFP [6]GoodCRC 41 0C 90 20 0D A1 0:02.510.164 PD 0:02.510.332 496.000 us 6 B Sink:DFP [7]PS_RDY 66 0E D9 F3 C6 95 0:02.510.835 499.000 us 6 B Sink:UFP [7]GoodCRC 41 0E BC 41 03 4F 0:02.515.008 498.000 us 6 B Source:UFP [5]PS_RDY 46 0B F4 23 28 70 0:02.515.598 499.000 us 6 B Sink:DFP [5]GoodCRC 61 0A 07 A1 EA DD 0:02.521.454 498.000 us 6 B DFP/UFP [0]Soft_Reset 4D 00 B7 23 0E 04 0:02.522.240 495.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:02.524.518 492.000 us 6 B Cable [0]Accept 43 01 AF 3E 8A ED 0:02.525.225 502.000 us 6 B DFP/UFP [0]GoodCRC 41 00 BB 6C BB A8 0:02.526.529 636.000 us 10 B DFP/UFP [1]VDM:DiscIdentity 4F 12 01 80 00 FF 90 4E 67 21 0:02.527.238 495.000 us 6 B Cable [1]GoodCRC 41 03 01 3D B2 31 0:02.529.491 1.155.000 ms 26 B Cable [1]VDM:DiscIdentity 4F 53 41 80 00 FF C2 20 00 24 00 00 00 00 10 00 04 00 58 58 08 21 69 B2 7F A9 0:02.530.669 499.000 us 6 B DFP/UFP [1]GoodCRC 41 02 97 0D B5 46 0:02.552.475 1.038.000 ms 22 B Source:UFP [6]Source_Cap 41 4D 2C 91 01 2E 2C D1 02 00 2C B1 04 00 A9 41 06 00 6A 63 9C D9 0:02.553.391 499.000 us 6 B Sink:DFP [6]GoodCRC 61 0C 32 04 89 34 0:02.554.003 PD 0:02.554.314 629.000 us 10 B Sink:DFP [0]Request 62 10 2C B1 04 13 0B 98 B4 5A 0:02.554.988 502.000 us 6 B Source:UFP [0]GoodCRC 41 01 2D 5C BC DF 0:02.559.103 502.000 us 6 B Source:UFP [7]Accept 43 0F A8 13 32 0A 0:02.559.800 496.000 us 6 B Sink:DFP [7]GoodCRC 61 0E 1E 65 87 DA 0:02.595.311 499.000 us 6 B Source:UFP [0]PS_RDY 46 01 EA CA FD 90 0:02.595.760 PD 0:02.595.849 493.000 us 6 B Sink:DFP [0]GoodCRC 61 00 19 48 3F 3D 0:02.596.784 496.000 us 6 B DFP/UFP [0]Soft_Reset 4D 00 B7 23 0E 04 0:02.597.569 495.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:02.599.348 492.000 us 6 B Cable [0]Accept 43 01 AF 3E 8A ED 0:02.600.039 499.000 us 6 B DFP/UFP [0]GoodCRC 41 00 BB 6C BB A8
After that, there's no more PD negotiation but the display was not turned on.
2. The log was a little different from the one between LG ultrafine and laptop connected by Thunderbolt 3, which was
m:s.ms.us Dur Len Role Message Data 0:00.000.000 Capture started [Wed May 20 14:48:39 2020] 0:00.076.465 PD 0:01.433.479 PD 0:01.574.458 632.000 us 10 B DFP/UFP [0]VDM:DiscIdentity 8F 10 01 A0 00 FF A4 45 02 72 0:01.575.377 495.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:01.575.775 PD 0:01.576.936 1.156.000 ms 26 B Cable [0]VDM:DiscIdentity 4F 51 41 80 00 FF C2 20 00 24 00 00 00 00 10 00 04 00 58 58 08 21 14 B3 BB 4D 0:01.578.243 496.000 us 6 B DFP/UFP [0]GoodCRC 01 00 BE 23 C2 58 0:01.579.268 629.000 us 10 B Source:DFP [0]Source_Cap A1 11 2C 91 01 27 B1 9B 26 94 0:01.580.112 502.000 us 6 B Sink:UFP [0]GoodCRC 41 00 BB 6C BB A8 0:01.584.174 633.000 us 10 B Sink:UFP [0]Request 42 10 00 00 00 12 0E EC 0B 60 0:01.584.960 499.000 us 6 B Source:DFP [0]GoodCRC 21 01 8A 37 41 BA 0:01.586.323 500.000 us 6 B Source:DFP [1]Accept 63 03 21 7B 00 96 0:01.586.891 502.000 us 6 B Sink:UFP [1]GoodCRC 41 02 97 0D B5 46 0:01.705.265 PD 0:01.705.375 496.000 us 6 B Source:DFP [2]PS_RDY 66 05 51 2A 14 02 0:01.705.662 499.000 us 6 B Sink:UFP [2]GoodCRC 41 04 A2 A8 D6 AF 0:01.707.541 633.000 us 10 B Source:DFP [3]VDM:DiscIdentity 6F 17 01 80 00 FF D6 C4 2B EE 0:01.708.168 499.000 us 6 B Sink:UFP [3]GoodCRC 41 06 8E C9 D8 41 0:01.712.335 1.039.000 ms 22 B Sink:UFP [1]VDM:DiscIdentity 4F 42 41 80 00 FF 3E 04 00 D4 00 00 00 00 79 03 4E 9A 33 3A 97 3F 0:01.713.417 496.000 us 6 B Source:DFP [1]GoodCRC 61 03 A3 19 36 A4 0:01.715.300 629.000 us 10 B Source:DFP [4]VDM:DiscSVID 6F 19 02 80 00 FF 59 D5 AE 43 0:01.715.862 PD 0:01.715.962 499.000 us 6 B Sink:UFP [4]GoodCRC 41 08 89 E4 60 A6 0:01.720.211 905.000 us 18 B Sink:UFP [2]VDM:DiscSVID 4F 34 42 80 00 FF 01 FF 87 80 00 00 00 00 9E 73 6F 0F 0:01.721.054 PD 0:01.721.164 496.000 us 6 B Source:DFP [2]GoodCRC 61 05 96 BC 55 4D 0:01.722.993 629.000 us 10 B DFP/UFP [1]VDM:DiscSVID 4F 12 02 80 00 FF 7E E1 D2 33 0:01.723.695 495.000 us 6 B Cable [1]GoodCRC 41 03 01 3D B2 31 0:01.725.302 892.000 us 18 B Cable [1]VDM:DiscSVID 4F 33 42 80 00 FF B4 04 87 80 00 00 00 00 26 C3 73 8A 0:01.726.344 499.000 us 6 B DFP/UFP [1]GoodCRC 41 02 97 0D B5 46 0:01.728.505 632.000 us 10 B Source:DFP [5]VDM:DiscMode 6F 1B 03 80 87 80 7D 83 AA 35 0:01.729.237 499.000 us 6 B Sink:UFP [5]GoodCRC 41 0A A5 85 6E 48 0:01.733.307 767.000 us 14 B Sink:UFP [3]VDM:DiscMode 4F 26 43 80 87 80 01 00 00 00 19 13 3B 58 0:01.734.227 499.000 us 6 B Source:DFP [3]GoodCRC 61 07 BA DD 5B A3 0:01.735.751 633.000 us 10 B DFP/UFP [2]VDM:DiscMode 4F 14 03 80 87 80 9A 11 56 B0 0:01.736.667 495.000 us 6 B Cable [2]GoodCRC 41 05 34 98 D1 D8 0:01.739.078 PD 0:01.739.188 753.000 us 14 B Cable [2]VDM:DiscMode 4F 25 43 80 87 80 01 00 43 00 1A 33 E2 BA 0:01.739.987 496.000 us 6 B DFP/UFP [2]GoodCRC 41 04 A2 A8 D6 AF 0:01.741.993 630.000 us 10 B Source:DFP [6]VDM:DiscMode 6F 1D 03 80 01 FF BD 25 89 17 0:01.742.727 502.000 us 6 B Sink:UFP [6]GoodCRC 41 0C 90 20 0D A1 0:01.746.788 767.000 us 14 B Sink:UFP [4]VDM:DiscMode 4F 28 43 80 01 FF 46 1C 00 00 C0 72 6D 30 0:01.747.603 496.000 us 6 B Source:DFP [4]GoodCRC 61 09 BD F0 E3 44 0:01.749.868 630.000 us 10 B DFP/UFP [3]VDM:EnterMode 4F 16 04 81 87 80 74 10 83 56 0:01.750.632 495.000 us 6 B Cable [3]GoodCRC 41 07 18 F9 DF 36 0:01.752.780 624.000 us 10 B Cable [3]VDM:EnterMode 4F 17 44 81 87 80 F9 61 F7 F0 0:01.753.664 496.000 us 6 B DFP/UFP [3]GoodCRC 41 06 8E C9 D8 41 0:01.757.103 632.000 us 10 B DFP/UFP [0]VDM:EnterMode 4F 10 04 81 87 80 D4 E5 C3 D9 0:01.758.020 497.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:01.759.724 630.000 us 10 B Cable [0]VDM:EnterMode 4F 11 44 81 87 80 59 94 B7 7F 0:01.760.394 500.000 us 6 B DFP/UFP [0]GoodCRC 41 00 BB 6C BB A8 0:01.762.157 763.000 us 14 B Source:DFP [7]VDM:EnterMode 6F 2F 04 81 87 80 01 00 43 00 14 7A BE E5 0:01.763.026 502.000 us 6 B Sink:UFP [7]GoodCRC 41 0E BC 41 03 4F 0:01.766.990 632.000 us 10 B Sink:UFP [5]VDM:EnterMode 4F 1A 44 81 87 80 48 A5 67 08 0:01.767.882 496.000 us 6 B Source:DFP [5]GoodCRC 61 0B 91 91 ED AA 0:01.809.743 502.000 us 6 B Sink:UFP [6]PR_Swap 4A 0C 5B F9 F9 42 0:01.810.393 500.000 us 6 B Source:DFP [6]GoodCRC 61 0D A4 34 8E 43 0:01.811.704 496.000 us 6 B Source:DFP [0]Accept 63 01 0D 1A 0E 78 0:01.812.278 502.000 us 6 B Sink:UFP [0]GoodCRC 41 00 BB 6C BB A8 0:01.852.522 PD 0:01.852.740 492.000 us 6 B Sink:DFP [1]PS_RDY 66 02 F2 BF 70 9C 0:01.853.141 499.000 us 6 B Sink:UFP [1]GoodCRC 41 02 97 0D B5 46 0:01.853.925 PD 0:01.857.413 498.000 us 6 B Source:UFP [7]PS_RDY 46 0F ED E7 45 77 0:01.857.849 496.000 us 6 B Sink:DFP [7]GoodCRC 61 0E 1E 65 87 DA 0:01.863.358 499.000 us 6 B DFP/UFP [0]Soft_Reset 4D 00 B7 23 0E 04 0:01.864.019 495.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:01.866.433 492.000 us 6 B Cable [0]Accept 43 01 AF 3E 8A ED 0:01.867.136 502.000 us 6 B DFP/UFP [0]GoodCRC 41 00 BB 6C BB A8 0:01.868.228 636.000 us 10 B DFP/UFP [1]VDM:DiscIdentity 4F 12 01 80 00 FF 90 4E 67 21 0:01.869.148 495.000 us 6 B Cable [1]GoodCRC 41 03 01 3D B2 31 0:01.871.329 1.157.000 ms 26 B Cable [1]VDM:DiscIdentity 4F 53 41 80 00 FF C2 20 00 24 00 00 00 00 10 00 04 00 58 58 08 21 69 B2 7F A9 0:01.872.590 502.000 us 6 B DFP/UFP [1]GoodCRC 41 02 97 0D B5 46 0:01.894.208 1.035.000 ms 22 B Source:UFP [0]Source_Cap 41 41 2C 91 01 2E 2C D1 02 00 2C B1 04 00 A9 41 06 00 3B 0B 84 4C 0:01.895.397 496.000 us 6 B Sink:DFP [0]GoodCRC 61 00 19 48 3F 3D 0:01.896.998 630.000 us 10 B Sink:DFP [0]Request 62 10 45 15 05 42 1D 85 9C C7 0:01.897.730 502.000 us 6 B Source:UFP [0]GoodCRC 41 01 2D 5C BC DF 0:01.901.791 502.000 us 6 B Source:UFP [1]Accept 43 03 83 5F 84 03 0:01.902.418 496.000 us 6 B Sink:DFP [1]GoodCRC 61 02 35 29 31 D3 0:01.947.428 498.000 us 6 B Source:UFP [2]PS_RDY 46 05 F3 0E 90 97 0:01.947.862 500.000 us 6 B Sink:DFP [2]GoodCRC 61 04 00 8C 52 3A 0:01.950.071 496.000 us 6 B DFP/UFP [0]Soft_Reset 4D 00 B7 23 0E 04 0:01.950.640 495.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:01.952.751 492.000 us 6 B Cable [0]Accept 43 01 AF 3E 8A ED 0:01.953.501 499.000 us 6 B DFP/UFP [0]GoodCRC 41 00 BB 6C BB A8
In this case, I could see VDM:EnterMode which was not seen from the other log. Could find anything from this? And I guess maybe this monitor might not support DP alt mode.
3. The other device, which actually is the real target, made this CC log with EVM. Its PD negotiation process never ends and repeats again and again.
m:s.ms.us Dur Len Role Message Data 0:01.704.507 PD 0:01.764.774 PD 0:01.972.952 629.000 us 10 B DFP/UFP [0]VDM:DiscIdentity 4F 10 01 80 00 FF F0 1D A7 5B 0:01.973.658 496.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:01.974.166 PD 0:01.975.465 1.157.000 ms 26 B Cable [0]VDM:DiscIdentity 4F 51 41 80 00 FF 1D 2B 00 1C 00 00 00 00 10 03 01 12 32 20 08 11 ED 38 DE 87 0:01.976.639 499.000 us 6 B DFP/UFP [0]GoodCRC 41 00 BB 6C BB A8 0:01.977.934 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:01.978.682 PD 0:01.979.801 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:01.981.526 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:01.982.108 PD 0:01.983.227 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.161.723 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.163.377 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.165.137 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.166.896 630.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.300.027 PD 0:02.345.229 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.347.095 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.348.750 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.350.508 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.528.942 627.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:02.529.627 498.000 us 6 B Sink:UFP [0]GoodCRC 01 00 BE 23 C2 58 0:02.533.610 636.000 us 10 B Sink:UFP [0]Request 42 10 2C 69 01 16 7F F9 9F D3 0:02.534.443 496.000 us 6 B Source:DFP [0]GoodCRC 61 01 8F 78 38 4A 0:02.535.088 496.000 us 6 B Source:DFP [1]Accept 63 03 21 7B 00 96 0:02.535.740 498.000 us 6 B Sink:UFP [1]GoodCRC 01 02 92 42 CC B6 0:02.570.976 496.000 us 6 B Source:DFP [2]PS_RDY 66 05 51 2A 14 02 0:02.571.735 498.000 us 6 B Sink:UFP [2]GoodCRC 01 04 A7 E7 AF 5F 0:02.572.205 PD 0:02.582.503 632.000 us 10 B Source:DFP [3]VDM:DiscIdentity 6F 17 01 80 00 FF D6 C4 2B EE 0:02.583.288 504.000 us 6 B Sink:UFP [3]GoodCRC 01 06 8B 86 A1 B1 0:02.587.382 1.043.000 ms 22 B Sink:UFP [1]VDM:DiscIdentity 4F 42 41 80 00 FF AC 05 00 6C 00 00 00 00 04 06 CE FA 4C D8 EE 64 0:02.588.515 495.000 us 6 B Source:DFP [1]GoodCRC 61 03 A3 19 36 A4 0:02.589.307 PD 0:02.589.416 627.000 us 10 B Source:DFP [4]VDM:DiscSVID 6F 19 02 80 00 FF 59 D5 AE 43 0:02.590.091 504.000 us 6 B Sink:UFP [4]GoodCRC 01 08 8C AB 19 56 0:02.594.178 774.000 us 14 B Sink:UFP [2]VDM:DiscSVID 4F 24 42 80 00 FF 00 00 01 FF D6 D1 F5 4E 0:02.595.041 499.000 us 6 B Source:DFP [2]GoodCRC 61 05 96 BC 55 4D 0:02.595.844 632.000 us 10 B Source:DFP [5]VDM:DiscMode 6F 1B 03 80 01 FF 1D D0 C9 98 0:02.596.630 500.000 us 6 B Sink:UFP [5]GoodCRC 01 0A A0 CA 17 B8 0:02.600.717 774.000 us 14 B Sink:UFP [3]VDM:DiscMode 4F 26 43 80 01 FF 45 00 04 00 AC 99 4A 9B 0:02.601.470 499.000 us 6 B Source:DFP [3]GoodCRC 61 07 BA DD 5B A3 0:02.602.557 632.000 us 10 B Source:DFP [6]VDM:EnterMode 6F 1D 04 81 01 FF 33 77 9C 8B 0:02.603.342 504.000 us 6 B Sink:UFP [6]GoodCRC 01 0C 95 6F 74 51 0:02.607.429 639.000 us 10 B Sink:UFP [4]VDM:EnterMode 4F 18 44 81 01 FF 48 A5 C4 DF 0:02.608.049 495.000 us 6 B Source:DFP [4]GoodCRC 61 09 BD F0 E3 44 0:02.608.977 762.000 us 14 B Source:DFP [7]VDM:DPStatus 6F 2F 10 81 01 FF 09 00 00 00 37 F1 C4 B0 0:02.609.901 501.000 us 6 B Sink:UFP [7]GoodCRC 01 0E B9 0E 7A BF 0:02.613.989 773.000 us 14 B Sink:UFP [5]VDM:DPStatus 4F 2A 50 81 01 FF 0A 00 00 00 AB DA 26 8E 0:02.614.744 495.000 us 6 B Source:DFP [5]GoodCRC 61 0B 91 91 ED AA 0:02.615.775 762.000 us 14 B Source:DFP [0]VDM:DPConfigure 6F 21 11 81 01 FF 06 04 00 00 B1 92 C6 EB 0:02.616.641 501.000 us 6 B Sink:UFP [0]GoodCRC 01 00 BE 23 C2 58 0:02.620.886 639.000 us 10 B Sink:UFP [6]VDM:DPConfigure 4F 1C 51 81 01 FF 25 A4 83 4D 0:02.621.613 499.000 us 6 B Source:DFP [6]GoodCRC 61 0D A4 34 8E 43 0:02.715.600 PD 0:02.766.694 PD 0:03.998.556 629.000 us 10 B DFP/UFP [0]VDM:DiscIdentity 4F 10 01 80 00 FF F0 1D A7 5B 0:03.999.475 496.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:04.001.331 1.157.000 ms 26 B Cable [0]VDM:DiscIdentity 4F 51 41 80 00 FF 1D 2B 00 1C 00 00 00 00 10 03 01 12 32 20 08 11 ED 38 DE 87 0:04.002.470 499.000 us 6 B DFP/UFP [0]GoodCRC 41 00 BB 6C BB A8 0:04.003.766 630.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.005.419 630.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.006.167 PD 0:04.007.285 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.009.044 630.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.009.679 PD 0:04.187.478 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.189.135 630.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.190.898 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.192.613 629.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.325.627 PD 0:04.371.079 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.372.733 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.374.599 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.376.360 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.554.676 626.000 us 10 B Source:DFP [0]Source_Cap 61 11 5A 90 01 24 C8 41 51 53 0:04.555.466 498.000 us 6 B Sink:UFP [0]GoodCRC 01 00 BE 23 C2 58 0:04.559.451 637.000 us 10 B Sink:UFP [0]Request 42 10 2C 69 01 16 7F F9 9F D3 0:04.560.181 495.000 us 6 B Source:DFP [0]GoodCRC 61 01 8F 78 38 4A 0:04.560.826 496.000 us 6 B Source:DFP [1]Accept 63 03 21 7B 00 96 0:04.561.397 498.000 us 6 B Sink:UFP [1]GoodCRC 01 02 92 42 CC B6 0:04.596.817 496.000 us 6 B Source:DFP [2]PS_RDY 66 05 51 2A 14 02 0:04.597.270 498.000 us 6 B Sink:UFP [2]GoodCRC 01 04 A7 E7 AF 5F 0:04.598.058 PD 0:04.608.249 632.000 us 10 B Source:DFP [3]VDM:DiscIdentity 6F 17 01 80 00 FF D6 C4 2B EE 0:04.609.045 504.000 us 6 B Sink:UFP [3]GoodCRC 01 06 8B 86 A1 B1 0:04.613.135 1.044.000 ms 22 B Sink:UFP [1]VDM:DiscIdentity 4F 42 41 80 00 FF AC 05 00 6C 00 00 00 00 04 06 CE FA 4C D8 EE 64 0:04.614.159 PD 0:04.614.269 493.000 us 6 B Source:DFP [1]GoodCRC 61 03 A3 19 36 A4 0:04.615.165 629.000 us 10 B Source:DFP [4]VDM:DiscSVID 6F 19 02 80 00 FF 59 D5 AE 43 0:04.615.847 504.000 us 6 B Sink:UFP [4]GoodCRC 01 08 8C AB 19 56 0:04.619.937 774.000 us 14 B Sink:UFP [2]VDM:DiscSVID 4F 24 42 80 00 FF 00 00 01 FF D6 D1 F5 4E 0:04.620.692 499.000 us 6 B Source:DFP [2]GoodCRC 61 05 96 BC 55 4D 0:04.621.601 632.000 us 10 B Source:DFP [5]VDM:DiscMode 6F 1B 03 80 01 FF 1D D0 C9 98 0:04.622.295 501.000 us 6 B Sink:UFP [5]GoodCRC 01 0A A0 CA 17 B8 0:04.626.473 774.000 us 14 B Sink:UFP [3]VDM:DiscMode 4F 26 43 80 01 FF 45 00 04 00 AC 99 4A 9B 0:04.627.442 499.000 us 6 B Source:DFP [3]GoodCRC 61 07 BA DD 5B A3 0:04.628.316 632.000 us 10 B Source:DFP [6]VDM:EnterMode 6F 1D 04 81 01 FF 33 77 9C 8B 0:04.628.995 504.000 us 6 B Sink:UFP [6]GoodCRC 01 0C 95 6F 74 51 0:04.633.190 639.000 us 10 B Sink:UFP [4]VDM:EnterMode 4F 18 44 81 01 FF 48 A5 C4 DF 0:04.633.920 495.000 us 6 B Source:DFP [4]GoodCRC 61 09 BD F0 E3 44 0:04.634.847 760.000 us 14 B Source:DFP [7]VDM:DPStatus 6F 2F 10 81 01 FF 09 00 00 00 37 F1 C4 B0 0:04.635.763 501.000 us 6 B Sink:UFP [7]GoodCRC 01 0E B9 0E 7A BF 0:04.639.747 774.000 us 14 B Sink:UFP [5]VDM:DPStatus 4F 2A 50 81 01 FF 0A 00 00 00 AB DA 26 8E 0:04.640.501 495.000 us 6 B Source:DFP [5]GoodCRC 61 0B 91 91 ED AA 0:04.641.532 762.000 us 14 B Source:DFP [0]VDM:DPConfigure 6F 21 11 81 01 FF 06 04 00 00 B1 92 C6 EB 0:04.642.452 501.000 us 6 B Sink:UFP [0]GoodCRC 01 00 BE 23 C2 58 0:04.646.557 639.000 us 10 B Sink:UFP [6]VDM:DPConfigure 4F 1C 51 81 01 FF 25 A4 83 4D 0:04.647.257 499.000 us 6 B Source:DFP [6]GoodCRC 61 0D A4 34 8E 43 0:04.742.053 PD 0:04.793.041 PD 0:06.025.040 PD ... ...
4. But when this device is connected to laptop by Thunderbolt 3, the PD negotiation ends and the display is turned on. The log is like following.
m:s.ms.us Dur Len Role Message Data 0:03.513.362 PD 0:03.549.415 PD 0:03.838.660 632.000 us 10 B DFP/UFP [0]VDM:DiscIdentity 8F 10 01 A0 00 FF A4 45 02 72 0:03.839.268 495.000 us 6 B Cable [0]GoodCRC 41 01 2D 5C BC DF 0:03.841.130 1.157.000 ms 26 B Cable [0]VDM:DiscIdentity 4F 51 41 80 00 FF 1D 2B 00 1C 00 00 00 00 10 03 01 12 32 20 08 11 ED 38 DE 87 0:03.842.431 496.000 us 6 B DFP/UFP [0]GoodCRC 01 00 BE 23 C2 58 0:03.843.470 629.000 us 10 B Source:DFP [0]Source_Cap A1 11 2C 91 01 27 B1 9B 26 94 0:03.845.051 629.000 us 10 B Source:DFP [0]Source_Cap A1 11 2C 91 01 27 B1 9B 26 94 0:03.846.849 629.000 us 10 B Source:DFP [0]Source_Cap A1 11 2C 91 01 27 B1 9B 26 94 0:03.957.192 632.000 us 10 B Source:DFP [1]Source_Cap A1 13 2C 91 01 27 D1 C8 E6 EE 0:03.958.990 632.000 us 10 B Source:DFP [1]Source_Cap A1 13 2C 91 01 27 D1 C8 E6 EE 0:03.960.472 632.000 us 10 B Source:DFP [1]Source_Cap A1 13 2C 91 01 27 D1 C8 E6 EE 0:04.070.949 629.000 us 10 B Source:DFP [2]Source_Cap A1 15 2C 91 01 27 71 3D A6 61 0:04.072.428 629.000 us 10 B Source:DFP [2]Source_Cap A1 15 2C 91 01 27 71 3D A6 61 0:04.074.226 629.000 us 10 B Source:DFP [2]Source_Cap A1 15 2C 91 01 27 71 3D A6 61 0:04.184.481 632.000 us 10 B Source:DFP [3]Source_Cap A1 17 2C 91 01 27 11 6E 66 1B 0:04.186.279 632.000 us 10 B Source:DFP [3]Source_Cap A1 17 2C 91 01 27 11 6E 66 1B 0:04.187.881 632.000 us 10 B Source:DFP [3]Source_Cap A1 17 2C 91 01 27 11 6E 66 1B 0:04.298.251 632.000 us 10 B Source:DFP [4]Source_Cap A1 19 2C 91 01 27 70 D0 56 A4 0:04.298.832 504.000 us 6 B Sink:UFP [4]GoodCRC 01 08 8C AB 19 56 0:04.303.025 635.000 us 10 B Sink:UFP [0]Request 82 10 2C B1 84 12 54 2B 74 00 0:04.303.814 499.000 us 6 B Source:DFP [0]GoodCRC 21 01 8A 37 41 BA 0:04.305.024 499.000 us 6 B Source:DFP [5]Accept A3 0B 5D 24 21 53 0:04.305.677 501.000 us 6 B Sink:UFP [5]GoodCRC 01 0A A0 CA 17 B8 0:04.424.371 496.000 us 6 B Source:DFP [6]PS_RDY A6 0D 2D 75 35 C7 0:04.424.855 504.000 us 6 B Sink:UFP [6]GoodCRC 01 0C 95 6F 74 51 0:04.445.022 629.000 us 10 B Source:DFP [7]VDM:DiscIdentity AF 1F 01 A0 00 FF 43 D7 FE F7 0:04.445.806 501.000 us 6 B Sink:UFP [7]GoodCRC 01 0E B9 0E 7A BF 0:04.449.790 1.043.000 ms 22 B Sink:UFP [1]VDM:DiscIdentity 8F 42 41 A0 00 FF AC 05 00 6C 00 00 00 00 04 06 CE FA 33 70 CD F8 0:04.450.984 496.000 us 6 B Source:DFP [1]GoodCRC 21 03 A6 56 4F 54 0:04.452.942 629.000 us 10 B Source:DFP [0]VDM:DiscSVID AF 11 02 A0 00 FF CC C6 7B 5A 0:04.453.622 501.000 us 6 B Sink:UFP [0]GoodCRC 01 00 BE 23 C2 58 0:04.457.816 774.000 us 14 B Sink:UFP [2]VDM:DiscSVID 8F 24 42 A0 00 FF 00 00 01 FF EB E6 F7 F9 0:04.458.738 499.000 us 6 B Source:DFP [2]GoodCRC 21 05 93 F3 2C BD 0:04.460.198 629.000 us 10 B DFP/UFP [1]VDM:DiscSVID 4F 12 02 80 00 FF 7E E1 D2 33 0:04.461.115 496.000 us 6 B Cable [1]GoodCRC 41 03 01 3D B2 31 0:04.463.461 890.000 us 18 B Cable [1]VDM:DiscSVID 4F 33 42 80 00 FF 87 80 B4 04 00 00 00 00 08 3A E0 3B 0:04.464.397 496.000 us 6 B DFP/UFP [1]GoodCRC 01 02 92 42 CC B6 0:04.466.697 632.000 us 10 B Source:DFP [1]VDM:DiscMode AF 13 03 A0 01 FF 88 C3 1C 81 0:04.467.488 501.000 us 6 B Sink:UFP [1]GoodCRC 01 02 92 42 CC B6 0:04.471.578 770.000 us 14 B Sink:UFP [3]VDM:DiscMode 8F 26 43 A0 01 FF 45 00 04 00 91 AE 48 2C 0:04.472.392 499.000 us 6 B Source:DFP [3]GoodCRC 21 07 BF 92 22 53 0:04.474.666 629.000 us 10 B Source:DFP [2]VDM:EnterMode AF 15 04 A1 01 FF A6 64 49 92 0:04.475.412 501.000 us 6 B Sink:UFP [2]GoodCRC 01 04 A7 E7 AF 5F 0:04.479.535 636.000 us 10 B Sink:UFP [4]VDM:EnterMode 8F 18 44 A1 01 FF 1C FD 61 F6 0:04.480.430 500.000 us 6 B Source:DFP [4]GoodCRC 21 09 B8 BF 9A B4 0:04.480.836 PD 0:04.482.243 762.000 us 14 B Source:DFP [3]VDM:DPStatus AF 27 10 A1 01 FF 01 00 00 00 FD 4C AA 79 0:04.483.057 504.000 us 6 B Sink:UFP [3]GoodCRC 01 06 8B 86 A1 B1 0:04.487.270 774.000 us 14 B Sink:UFP [5]VDM:DPStatus 8F 2A 50 A1 01 FF 0A 00 00 00 96 ED 24 39 0:04.488.085 499.000 us 6 B Source:DFP [5]GoodCRC 21 0B 94 DE 94 5A 0:04.490.116 765.000 us 14 B Source:DFP [4]VDM:DPConfigure AF 29 11 A1 01 FF 06 04 00 00 94 07 1C E7 0:04.490.936 505.000 us 6 B Sink:UFP [4]GoodCRC 01 08 8C AB 19 56 0:04.495.131 635.000 us 10 B Sink:UFP [6]VDM:DPConfigure 8F 1C 51 A1 01 FF 71 FC 26 64 0:04.495.898 496.000 us 6 B Source:DFP [6]GoodCRC 21 0D A1 7B F7 B3 0:04.528.508 504.000 us 6 B Sink:UFP [7]Get_Source_Cap_Ext 91 0E A3 84 3B CE 0:04.528.950 499.000 us 6 B Source:DFP [7]GoodCRC 21 0F 8D 1A F9 5D 0:04.530.232 1.332.000 ms 29 B Source:DFP [5]Source_Cap_Ext A1 8B 17 00 B4 04 D0 F6 00 00 00 00 01 01 00 00 00 02 00 00 00 00 00 00 00 9E 7C FC E6 0:04.531.624 501.000 us 6 B Sink:UFP [5]GoodCRC 01 0A A0 CA 17 B8 0:04.535.838 605.000 us 11 B Sink:UFP [0]Get_Battery_Cap 83 80 01 00 00 00 00 53 E1 FF DC 0:04.536.591 499.000 us 6 B Source:DFP [0]GoodCRC 21 01 8A 37 41 BA 0:04.538.144 499.000 us 6 B Source:DFP [6]Not_Supported B0 0D FA C0 AD DB 0:04.538.904 504.000 us 6 B Sink:UFP [6]GoodCRC 01 0C 95 6F 74 51 0:04.542.909 602.000 us 11 B Sink:UFP [1]Get_Battery_Status 84 82 01 00 00 00 00 C8 F5 D6 C4 0:04.543.557 495.000 us 6 B Source:DFP [1]GoodCRC 21 03 A6 56 4F 54 0:04.545.125 495.000 us 6 B Source:DFP [7]Not_Supported B0 0F D6 A1 A3 35 0:04.545.671 501.000 us 6 B Sink:UFP [7]GoodCRC 01 0E B9 0E 7A BF 0:04.549.885 504.000 us 6 B Sink:UFP [2]Get_Status 92 04 7E 3E C3 05 0:04.550.434 499.000 us 6 B Source:DFP [2]GoodCRC 21 05 93 F3 2C BD 0:04.551.573 662.000 us 9 B Source:DFP [0]Status A2 81 03 00 00 94 A0 14 DF 0:04.552.391 501.000 us 6 B Sink:UFP [0]GoodCRC 01 00 BE 23 C2 58 0:04.556.501 639.000 us 10 B Sink:UFP [3]Get_Mfg_Info 86 86 02 00 00 00 DF DB 84 ED 0:04.557.181 499.000 us 6 B Source:DFP [3]GoodCRC 21 07 BF 92 22 53 0:04.558.284 932.000 us 17 B Source:DFP [1]Mfg_Info A7 83 0B 00 B4 04 D0 F6 43 79 70 72 65 80 FE D9 BB 0:04.559.369 501.000 us 6 B Sink:UFP [1]GoodCRC 01 02 92 42 CC B6 0:04.563.475 635.000 us 10 B Sink:UFP [4]VDM:DiscIdentity 8F 18 01 A0 00 FF 65 0E 72 42 0:04.564.369 499.000 us 6 B Source:DFP [4]GoodCRC 21 09 B8 BF 9A B4 0:04.565.758 1.165.000 ms 26 B Source:DFP [2]VDM:DiscIdentity AF 55 41 A0 00 FF 23 A3 00 AE 00 00 00 00 00 00 EF 17 0A 00 00 00 EE AA 02 2F 0:04.567.076 500.000 us 6 B Sink:UFP [2]GoodCRC 01 04 A7 E7 AF 5F 0:11.699.522 770.000 us 14 B Sink:UFP [5]VDM:Attention 8F 2A 06 A1 01 FF 8A 00 00 00 EC A1 34 47 0:11.700.272 499.000 us 6 B Source:DFP [5]GoodCRC 21 0B 94 DE 94 5A 0:14.814.609 770.000 us 14 B Sink:UFP [6]VDM:Attention 8F 2C 06 A1 01 FF 0A 00 00 00 5D 6E 77 D9 0:14.815.369 496.000 us 6 B Source:DFP [6]GoodCRC 21 0D A1 7B F7 B3 0:22.016.750 770.000 us 14 B Sink:UFP [7]VDM:Attention 8F 2E 06 A1 01 FF 8A 00 00 00 E0 F0 D8 1A 0:22.017.571 499.000 us 6 B Source:DFP [7]GoodCRC 21 0F 8D 1A F9 5D
In here, I found some different messages like Source_Cap_Ext, Battery_Cap, Not_Supported, Mfg_Info and VDM:Attention.
I hope you can find any tiny clue from these.
Thanks so much for your support.
Jesun
Jesun
Please give me a day or two to review the log.
Please refer to the latest PD spec and this app note to gain a better understanding of the PD Alt Mode Negotiation:
.
Thanks
David
Hello,
Would you be able to post the PD analyzer files an not just screenshots of the communication? The analyzer help decode the messages to give more information. Also, what PD analyzer are you using?
Hello Adam,
I'm attaching the logs below. I've used the "USB Power Delivery Analyzer" by Total Phase.
Thank you very much for your help.
Regards,
Jesun
Hello,
In the log labeled CustomDevice-DP-TUSB1046.tdc the voltage on VBUS is cycling on an off. I believe this is because whatever device is supplying the voltage on VBUS, the voltage is not high enough so I believe we are entering into a under voltage evemt, where the PD controller will cycle off the power since the device is not meeting the Type-C source requirements
As far as your other captures, would you be able to explain the difference in the test setup between each capture, and if the overall system failure is seen or not
