Hi Team,
The customer is experiencing below issue and needs your help.
system structure:
After the analog video signal was adjusted and amplified by the op amp, it entered the ADC for analog-to-digital conversion. After the amplifier, 50MHz of noise was measured on the analog signal before the ADC. He suspected that it was caused by the input clock of CR90CR285 (TXCLK is just 50MHz). It is verified that the 50MHz interference analog signal was suspended by FPGA.
The TXOUT0 +/- ~ TXOUT3 +/- and TXCLKOUT +/- ~ on the board were output through the macro connector, and his own line (one end was a micro-rectangular connector, and the other end was a Camerlink 26-pin connector to the computer board).
The strange thing was that if you don't connect the computer board, there would be no 50MHz interference.
Customer would like to know how to resolve this case?
Thanks,
Annie
