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About recessive and dominant on CAN Transceiver

GARAM AN
Intellectual 1960 points
Other Parts Discussed in Thread: TCAN1043

Hi all,

When Vd is lower than 0.5v, the status is recessive, when Vd is over than 0.9v, the status is dominat. What is the status “over than 0.5v and lower than 0.9v”? If the voltage is between 0.5v and 0.9v, how the signal works?

I can find “A CAN compliant driver must produce at least 1.5V across a 54Ω load” sentence about recessive and dominant, what is the meaning of this sentense?

Thank you

  • 0
    TI__Guru 72242 points

    Garam,

    The range between 0.5V and 0.9V differential is an indeterminate voltage range where the output is not known. These differential voltage thresholds are set by the ISO 11898-2 CAN specification. In a system operating nominally, this voltage range won't be a steady-state voltage, but a transition range from dominant to recessive and recessive to dominant. 

    The 1.5V across a 54Ω load point is defining the minimum bus driver strength for the CAN transceiver. The transceiver needs to be able to at least drive 1.5V across a 54Ω termination resistance to meet the differential threshold in even non-ideal bus conditions.

    Please let me know if this makes sense or if you have any other questions.

    Regards,

  • 0 in reply to Eric Hackett
    TI__Intellectual 1960 points

    Thank you Eric, I appreciated your answer.

    Can I ask that you meant the load resistor is 54 ohm instead of 60 or 120 ohm?

    Thank you

  • 0 in reply to GARAM AN
    TI__Guru 72242 points

    Garam,

    Yes, I meant 54Ω, that is the value defined in the CAN specification. 120Ω is the characteristic impedance of the CAN twisted pair cabling, which is why 120Ω termination resistors are used at each end node.

    Regards,

  • 0 in reply to Eric Hackett
    TI__Intellectual 1960 points

    Hi Eric,

    The below picture is TCAN1043 block diagram, and there are two resistors. Are those load resistors?

    If load resistor is 54 ohm, the one of box is 27, because it is voltage divider, is this correct?

  • 0 in reply to GARAM AN
    TI__Guru 72242 points

    Garam,

    The load resistance is the termination resistance on the bus, not the bias unit shown in the diagram. The bias unit is internal to the device and made up of a higher-valued resistor divider to bias the recessive level to VCC/2.

    The idea is that the driver needs to be able to force at least 1.5V over the termination resistance so that the transceiver can guarantee proper voltage differential in the dominant case.

    Regards,

  • 0 in reply to Eric Hackett
    TI__Intellectual 1960 points

    Can I ask how the bias unit makes 5v(CANH) and 0v(CANL) from the TX signal on the picture?

    How the both of CANH and CANL can be 2.5v(recessive) with bias resistors?

    Thank you

  • 0 in reply to GARAM AN
    TI__Guru 72242 points

    Garam,

    When TXD is logic 0, the comparator sends the signal to drive both FETs (one on CANH and one on CANL). so that CANH is pulled up to VCC and CANL is pulled down to GND. Due to voltage drops over RDSon of the FETs and diodes, the voltage seen at CANH won't reach 5V, and CANL won't reach 0V. See my latest response here for more details on that.

    A resistor divider is connected from VCC to GND to create the VCC / 2 value, which both CANH and CANL are connected to. When TXD is logic 1, the FETs are not drive, so the CANH and CANL signals are biased to this resistor divider which sets the voltage to VCC / 2.

    Regards,