Other Parts Discussed in Thread: DP83TC811
I am working on an application that uses DP83TC811R-Q1. The devices will be connected to an RMII MAC and operate as RMII slaves. The datasheet states that it's possible to configure the slave to emit the TX_TCLK clock that is synchronized with the master's transmit clock on a GPIO pin. I have questions about this clock:
1. Is this clock 66.667MHz? I have seen this in other documents about 100BASE-T1, but I don't see it stated in the DP83TC811R-Q1 datasheet.
2. What is the TC_TCLK clock based on? Is it derived from the RMII reference clock input provided to the 100BASE-T1 master PHY on its XI pin? Or is it sourced from an internal oscillator that is separate from external clock signals provided to the chip?
Thanks!