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About CAN arbitration

GARAM AN
Intellectual 1990 points

Hi all,

I could find this picture on the apps notes.

http://www.ti.com/lit/an/slla270/slla270.pdf?&ts=1589874500256

1. I know that CAN bus has 2 differential wire (CANH and CANL), can you explain why there is a wire on the actual CAN Bus signal on the picture?

2. 

a) A area

Node A sent data at first, Node B and C fill the ACK bit  because they get the message from NODE A without any error.

Can I understand like NODE B and C send ACK message to NODE A that they got message without error?

The ACK bit of sending NODE(NODE A now)  is always 1?

b) B area

NODE B and C sent message at the same time, 

how much time delay of NODE B from ACK bit to starting of sending data(ts)?

Can I adjust the time or it's fixed?

Thank you

  • 0
    TI__Guru 62920 points

    Hi Garam,

    Channel 1 shows the differential voltage on the CAN bus (i.e., VCANH - VCANL).

    You are right about the ACK delimiter.  This is a recessive-dominant-recessive pattern sent by each node that successfully received the frame.  The sending now (e.g., Node A in "A Area" above) remains recessive during this period.

    The minimum time from the dominant ACK bit of a data frame and the start of the next data frame is 11 bits.  This is made up of the last recessive bit of the ACK delimiter pattern, a 7-bit "end of frame" delimiter, and a minimum 3-bit intermission period.  You can read a more detailed description of this here:

    http://www.copperhilltechnologies.com/can-bus-guide-message-frame-format/

    Note that this is the minimum required spacing per the ISO 11898 protocol; it would be OK to allow for longer idle periods between transmissions.

    Regards,
    Max

  • 0 in reply to Miguel Robertson
    TI__Intellectual 1990 points

    a) A area

    Node A sent data at first, Node B and C fill the ACK bit in the ACK delimiter. If then what is the shown in the ACK slot on NODE A, B and C?

    b) B area

    NODE C win on the arbitration, so NODE C is sending on the B area, is this correct?

    if the speed is 1Mbps, there are 10 bits(7+3) more after ACK delimiter, and the ts is 10/1M, is this correct?

    Thank you

  • 0 in reply to GARAM AN
    TI__Guru 62920 points

    You are right about the "ts" time after the frame completes.

    In the A area, yes Nodes B and C send a dominant bit during the ACK delimiter while Node A is recessive throughout this period.  Since any dominant node results in a dominant bus state, the CAN bus shows a dominant bit during this period.  This is apparent in the top waveform.  Please let me know if that doesn't answer your question.

    You are right about the B area.  First Node C wins arbitration, so it completes its data frame while Node B goes recessive.  Once Node C's frame completes,it has no more data to send.  At this time Node B retries its communication.  Since the higher-priority Node C is not sending a frame at this time, Node B wins arbitration.  So, Node B is then able to send the data portion of its frame.

    Regards,
    Max