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DS90UB926Q-Q1: Test pattern problem

Yuri Oreshnikov
Intellectual 260 points
Part Number: DS90UB926Q-Q1
Other Parts Discussed in Thread: ALP

Hi, I try to make test pattern wok but have a problem. When I select pattern generator in Analog Launch PAD, set timing source internal, I see by oscilloscope all parallel output signals are present exept pclk.

I checked registers shown in AN-2198

reg 0x65 bit3 = 0; (selects internal clock) bit2 = 0x01 (patterngenerator creates its own timings)

reg 0x39 bit1 = 1; (PatternGeneratorwith internal PCLK).

Is there any other regs to change to turn on PCLK?

  • 0
    TI__Genius 12866 points

    Hello,

    If you are using the ALP Pattern Generator page, you would need to check Enable Generator after setting the timing source to internal. 

    This should enable the PCLK output. 

    If this is done and you don't see the PCLK output, please let me know if you are using a TI EVM or your own boards.

    If it's your own board, would you be able to post a schematic?

    Best Regards,

    Charley Cai

  • 0 in reply to Charley Cai
    Intellectual 260 points

    Hi, thank You for advice to look at schematic. In our custom board pin OEN is pulled down to GND through 39k. So I set 6bit (OENandOSS_SELOverride), 7bit (LVCMOSOutputEnable) and bit4 (OSSSelectto ControlOutputStateduringLockLowPeriod) in reg 0x02. And everything works fine. But its strange I saw output signals when OEN was pulled down.