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DS90UB960-Q1: pattern generator on two lanes csi2 setup is not working

Part Number: DS90UB960-Q1

Hello.

I have TDA2PX and two ub960 connected to it via CSI2 interface: first UB960 use 4 lanes of CSI2 ans second UB960 use only 2 lanes. On TDA2PX I see 30 fps flow from first UB960 and no frames from second UB960.

Then I turn off pattern generator - I see video streams from FPDLink cameras connected to both of UB960. Only pattern generator on second UB960 (which has 2 lanes setup) is not working.

My setup:

  • Vision SDK 3.0.7
  • late attach
  • pipeline on M4 core (ipu2)

UB960 initialization:

    device->write(device, 0x01, 0x02);
    Task_sleep(100);

    device->write(device, 0x1f, 0x00);     /*1.6gbps, 200mhz, external clock*/

    device->write(device, 0xB0, 0x1E);    /*select csi-2 reserved registers, auto increment on */
    device->write(device, 0xB1, 0x16);
    device->write(device, 0xB2, 0x00);    /* write 0x0 at 0x16 */
    device->write(device, 0xB2, 0x00);    /* write 0x0 at 0x17 */
    device->write(device, 0xB2, 0x00);    /* write 0x0 at 0x18 */
    device->write(device, 0xB2, 0x00);    /* write 0x0 at 0x19 */

    device->write(device, 0xB0, 0x1C);    /*select csi-2 reserved registers, auto increment off */
    device->write(device, 0xB1, 0x15);
    device->write(device, 0xB2, 0x0A);   /* this transactions has no effect */
    Task_sleep(10);
    device->write(device, 0xB2, 0x00);
    Task_sleep(10);

    device->write(device, 0x0D, 0xB9); /* force I/O to 3V3 (0x90 in softeq, but why?) */

    device->write(device, 0x32, 0x01); /* Enable TX port 0*/
    device->write(device, 0x20, 0x00); /* Forwarding and using CSIport 0 */
    device->write(device, 0x21, 0x03); /* Turn on round robin for both ports*/

    device->write(device, 0x19, 0x01); /* frame sync high time 1 */
    device->write(device, 0x1A, 0x15); /* frame sync high time 0*/
    device->write(device, 0x1B, 0x09); /* frame sync low time 1*/
    device->write(device, 0x1C, 0xC3); /* frame sync low time 0 */
    device->write(device, 0x18, 0x01); /* Start FSIN. Delay to allow it to stabilize */

    /* continous clock mode + lane count */
    /*
    if (csi_lines == 4)
        device->write(device, 0x33, 0x02);
    else if (csi_lines == 3)
        device->write(device, 0x33, 0x12);
    else if (csi_lines == 2)
        device->write(device, 0x33, 0x22);
    else if (csi_lines == 1)
        device->write(device, 0x33, 0x32);
    else
        UTILS_assert(FALSE);
    */
    device->write(device, 0x33, 0x02);
    device->write(device, 0xB9, 0x18); /* enable parity error counter */
    device->write(device, 0x42, 0x71); /* enable SFILTER + AEQ */

    { //// TODO
        /*Sets GPIOS*/
#ifdef BIST_EN
        device->write(device, 0x10, 0xA1); /* BC_GPIO0 RX0 */
        device->write(device, 0x11, 0xA5); /* BC_GPIO1 RX1 */

        device->write(device, 0x12, 0xA9); /* BC_GPIO0 RX2 */
        device->write(device, 0x13, 0xAD); /* BC_GPIO1 RX3 */
#else
        device->write(device, 0x10, 0x81); /* BC_GPIO0 RX0 */
        device->write(device, 0x11, 0x85); /* BC_GPIO1 RX1 */

        device->write(device, 0x12, 0x89); /* BC_GPIO0 RX2 */
        device->write(device, 0x13, 0x8D); /* BC_GPIO1 RX3 */
#endif
        device->write(device, 0x14, 0x0B); /* SYNC_CAMERA0 */
        device->write(device, 0x15, 0x00); /* BC_GPIO5 */

        device->write(device, 0x16, 0x00); /* BC_GPIO6 */
        device->write(device, 0x17, 0x00); /* BC_GPIO7 */
    }

    /* YUV422 */
        device->write(device, 0xB0, 0x00); /* Indirect Pattern Gen Registers */
        device->write(device, 0xB1, 0x01); /* PGEN_CTL                       */
        device->write(device, 0xB2, 0x01); /* enable pgen                    */
        device->write(device, 0xB1, 0x02); /* PGEN_CFG                       */
        device->write(device, 0xB2, 0x32); /* 8 bars, block size = 0x2       */
        device->write(device, 0xB1, 0x03); /* PGEN_CSI_DI                    */
        device->write(device, 0xB2, ((device->csi_port_idx << 6) & 0xC) | 0x1E); /* 0x1E=YUV422_8B                 */
        device->write(device, 0xB1, 0x04); /* PGEN_LINE_SIZE1                */
        device->write(device, 0xB2, 0x0F); /* 0xF00 (3840) bytes for 1920 pixels   */
        device->write(device, 0xB1, 0x05); /* PGEN_LINE_SIZE0                */
        device->write(device, 0xB2, 0x00); /*                                */
        device->write(device, 0xB1, 0x06); /* PGEN_BAR_SIZE1                 */
        device->write(device, 0xB2, 0x01); /*                                */
        device->write(device, 0xB1, 0x07); /* PGEN_BAR_SIZE0                 */
        device->write(device, 0xB2, 0xE0); /*                                */
        device->write(device, 0xB1, 0x08); /* PGEN_ACT_LPF1                  */
        device->write(device, 0xB2, 0x08); /*                                */
        device->write(device, 0xB1, 0x09); /* PGEN_ACT_LPF0                  */
        device->write(device, 0xB2, 0x75); /*                                */
        device->write(device, 0xB1, 0x0A); /* PGEN_TOT_LPF1                  */
        device->write(device, 0xB2, 0x04); /*                                */
        device->write(device, 0xB1, 0x0B); /* PGEN_TOT_LPF0                  */
        device->write(device, 0xB2, 0x38); /*                                */
        device->write(device, 0xB1, 0x0C); /* PGEN_LINE_PD1                  */
        device->write(device, 0xB2, 0x03); /*                                */
        device->write(device, 0xB1, 0x0D); /* PGEN_LINE_PD0                  */
        device->write(device, 0xB2, 0x00); /*                                */