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DP83869HM: Link not coming up

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

Hi,

We are using DP83869 in rgmii to copper, Auto Negotiation enabled mode. RGMII side is connected to Zynq FPGA (PS section)

Refer attached document for Schematics,mode settings, RESET  timings and MDIO register values..

When line side is connected to PC, link is not coming up. Refer to attached MDIO register values. Can you suggest what could be the reasons for DP83869 link not coming up.

How to go about further debug? TI Forum DP83869 Issue.pdfWe checked connectivity from transformer up to RJ45 

Thanks

Jinto

  • Hello Jinto,

    Can you try following :

    1. Forcing 869HM in fixed speed mode (desired speed) and see if you get a link up (to rule auto negotiation issue with link-partner).

    2. When you see link-down in auto-negotiation mode itself, can you try writting register 0x001F = 8000 and see if link gets re-established with link-partner (it restarts the auto-neg state machine).

    --

    Regards,

    Vikram 

  • Forced DP83869 to 10mbps mode. Still link did not come up. Will try twritting register 0x001F = 8000

  • Hi Vikram,

    We tried writting register 0x001F = 8000, but still no luck; the link is still down.

    With Regards,

    Senthilkumar

  • Restarted Auto negotiation by writing register 0x001F = 8000. Stii link is down

  • Hi Vikram,

    We tried loopback, link status is coming up for both analog and digital loopback.

    Please suggest us where might be the issue in getting link status with the external PC (RJ45)

    Regards,

    Senthilkumar R

  • Hi Jinto, Senthil,

    I reviewed the schematic again but could not find any obvious reason of failure of link (though caps connected on both sides of connector's common terminals are not what is recommended in the datasheet). Also what is the cable length used : Is it >100m?

    We can try the following to see where the problem is :

    1. Loopback : I see that you have already tried that and it is showing link-up.

    2. Linking same two boards instead of PC.Does it work?

    3. Is there any other link-partner that we can try? Just to be sure, when forced mode was tried on 869 the link-partner was also configured in correct forced mode or auto-neg mode..correct?

    4. Measure the clock frequency on pin 40. Does it meet 25MHz +/- 50ppm spec?

    5. Can you read register 0x01DF to see if strap modes are latched correctly?

    --

    Regards,

    Vikram  

  • Hi Vikarm

    We could pin point it to port mirroring. Port mirroring was getting enabled due to FPGA internal pull up. We did a step by step loop back(RGMII loop back, analog loop back and external loop back at 100mbps) to figure it out