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LMH1297: unlock when pathological bit pattern

Katsu Matsunaga
Expert 7730 points
Part Number: LMH1297
Other Parts Discussed in Thread: SIGCONARCHITECT

Hello,

My customer is facing a problem when pathological pattern (1/20) in 12G.

They has observed LOCK_N high for 10ms that is occurred one per 30 min~2 hours in the test.

Is it able to fix by changing register configuration?

Do you have any idea to find root cause and solving this problem?

Best regards, Katsu

  • 0
    TI__Guru* 93670 points

    Greetings Katsu-San,

    1). I am assuming LMH1297 is setup in equalizer mode. Please confirm. Also, it would be a good idea to have a block diagram of the overall test.

    2). Additionally i am assuming return loss is meeting the required SMPTE specifications.

    3). Is this application using SMBus interface? Can we use SigconArchitect GUI and capture high level page when this issue occurs?

    Regards,,, Nasser

  • 0 in reply to Nasser Mohammadi
    TI__Expert 7730 points

    Hi Nasser-san,

    thank you for your reply.

    1). I am assuming LMH1297 is setup in equalizer mode. Please confirm. Also, it would be a good idea to have a block diagram of the overall test.

       => schematic will be sent you on email. please check it and give your comments.

    2). Additionally i am assuming return loss is meeting the required SMPTE specifications.

      => Customer confirmed that the return loss meet the requirement.

    3). Is this application using SMBus interface? Can we use SigconArchitect GUI and capture high level page when this issue occurs?

      => try to capture the page. it will be sent you later.

    Best regards,

    Katsu