• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 32 subscribers
  • Views 235 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB921-Q1: GPIO REG pass through between 921 and 948

Amelie Zheng
Genius 10865 points
Part Number: DS90UB921-Q1

Hi Team,

My customer now use I2S in 921 to pass through data.

It could pass through but the frequency is not correctly.

When input 4MHz PWM in 921, it could only output 200kHz PWM in 948.

The waveform are as following:

4MHz in 921:

70k in 948:

I saw the GPIO Brf=0.25*f and Brb=40kHz. But datasheet haven't mentioned about GPIO_REG.

May I ask what the max data rate in GPIO_REG?

 

  • 0
    TI__Guru** 103215 points

    Hello Amelie,

    What signal is being shown here? I2S_CLK, I2S_WC, or I2S_DA? What is the PCLK rate being used as the input to the 921 during this test? Also are you using I2S forward channel frame mode or data island mode? Also why is the signal so distorted? It would be strongly suggested to improve the input signal quality 

    GPIO_REG are GPIOs controlled by register so this is not applicable for the I2S rate. The I2S signals must be < 1/4 of the PCLK rate

    Best Regards,

    Casey