DP83822HF: RGMII (100Mb, full duplex)

Hello Kien,

Please share the following :

1. Schematic of the board.

2. What configuration was done ?

3. Is customer able to read and write the registers correctly?

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Regards,

Vikram

Dear all,

1, Schematic

2. Configuration done when auto-negociation fail 

- RGMII

- 10Base-T half duplex

3. Register value 0x0467 is 0xFEE0, 0x0468 is 0x000F, all configure look like OK but  when connect PHY to PC or switch, we can't make PHY Auto-Negociation

Hi Kien,

Can you please help me with pdf version of the schematic as picture (resistor values etc) is not clear to me.

Are you saying that no register were written to phy? From register 0x0467=0xFEE0 , it looks like phy has been programmed in "half duplex" where earlier you mentioned that expectation is "full-duplex". Can you double check?

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Regards,

Vikram

Hi Vikram,

1. Attach file is schematic of PHY pdf version

[09]_ETH_PHY.pdf

2. When read Register value 0x0467 is 0xFEE0, 0x0468 is 0x000F, configure mode is 

- 10BASE-Te, Half/Full-Duplex or

- 100BASE-TX, Half/Full-Duplex (see table 12 in datasheet DP83822)

But PHY can't nagociation so auto seclect 10Base-Te half duplex

Hi Vikram,

Can you give me one configuration of bootstrap has been verified with the following requirements:

- RGMII

- 100 Base-TX, full-duplex

- Crystal 25Mhz

Best regards,

Minh

Hello Minh,

As mentioned in the thread earlier, do re-look at the straps as register 0x0467 suggests that you are in 100BTx-half duplex mode. Try removing pull -down on LED_0 pin and see if 822 then comes up in correct 100BTx mode for you to link-up.

Kindly refer to table 10 and 11 of datasheet for strap settings. Are'nt you targetting : AN-EN=1, AN_1=1 and AN_0=1 ? At present your setting is AN-EN=1, AN_1=1 and AN_0=0.

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Regardsm

Vikram

Hi Vikram

I removed Resistor R295 at Led_0 pin.

Bootstrap at LED_0 changed to MODE 4 but DP83822 still cannot auto negotiation

I have read the value of some registers. And the result is:

<ADDR>: <VALUE>

0x0467: FEE3

0x0000: 3100

0x0001: 7849

0x0010: 4002

0x0017: 0241

0x0019: 803F

I need your help.

Minh

Hi Minh,

Your read configuration looks ok to me for auto-negotiation to work. I will send it for review again in the team and will get back to you if we find anything in a couple of days.

Meanwhile can you let me know the following :

1. As in the schematic is their a pull-down on resetn pin on the board? Why?

2. Is link-partner also in auto-neg mode? Can you confirm that forcing 822 in appropriate forced mode also does not show link-up? 

3. Do you have capability to probe the connector side output of phy? Do you see any output on the Tx channel in force MDI mode?

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Regards,

Vikram

Hi Minh,

Here is the additional information that team suggests to log when autonegotiation fails (to check the status of state machine) :

0x6[1] – Autoneg page received latch high indication

0x10[14] read multiple times and see if it is toggling (indicates that MDI/MDIX auto resolution not converging)

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Regards,

Vikram