Mark

Pixel clock = 2880 * 960 * 60 = 165.89MHz

Min DSI clock frequency = 165.89 * 24 / (4*2) = 497.67MHz

The 497.67MHz is below the max 750MHz DSI clock frequency that can be supported by the DSI86, so DSI86 should able to support this resolution.

Did you update the DSI86 video registers to match this resolution?

Thanks

David

Hi David,

yes, the Video Register should be okay. The Output of the DSI86 Colorbar results in the right resolution at the output. My Video Registers are:

0x20 - 0x40
0x21 - 0x0B
0x24 - 0xC0
0x25 - 0x03
0x2C - 0x21
0x2D - 0x00
0x30 - 0x02
0x31 - 0x00
0x34 - 0x82
0x36 - 0x05
0x38 - 0x89
0x3A - 0x13

The compete Htotal is 3180, Vtotal is 986

So I think the Pixel Clock is 3180 *986 * 60 = 188.12Mhz which should also be okay. 

Min DSI clock frequency = 165.89 * 24 / (4*2) = 497.67MHz <-- In this calculation what is the (4 * 2) ?

Best Regards, 

Mark

Mark

DSI is double edge clocking, so 4 is the one DSI port with 4 lanes, and 2 accounts for the double edge clocking.

Are you using REFCLK or DSI_CLK to clock the DSI86? 

With the color bar being stable, the issue is probably on the DSI side. Have you tried to change the DSI RX equalization (Register 0x11) and see if helps?

Thanks

David

Hi David,

I use the external Clock with 27Mhz. I tried register 0x11 with value 0xAA and 0xFF. The Flickering behaviour changes a little but it is not solved at all. I can't even say if it is better or worse. 

My whole configuration is:

	//======Make ASSR RW on page 7, then back to page 0============
	i2c_tidsi_write(TI_DSI_ADDR1, 0xFF, 0x07);	//
	i2c_tidsi_write(TI_DSI_ADDR1, 0x16, 0x01);	//
	i2c_tidsi_write(TI_DSI_ADDR1, 0xFF, 0x00);	//

	i2c_tidsi_write(TI_DSI_ADDR1, 0x5C, 0x01);	//Disable HPD
	i2c_tidsi_write(TI_DSI_ADDR1, 0x0A, 0x06);	//Refclk Frequency = 27MHZ	
	_delay_ms(50);

	// DSI Lane Config
	i2c_tidsi_write(TI_DSI_ADDR1, 0x10, 0x26);	//0010 0000 Single DSI (CHA) 4 Lanes
	i2c_tidsi_write(TI_DSI_ADDR1, 0x5A, 0x04);	//Enable ASSR
	i2c_tidsi_write(TI_DSI_ADDR1, 0x59, 0x1B);	//DP Routing Lanes
	i2c_tidsi_write(TI_DSI_ADDR1, 0x93, 0x30);	//0x20 = 2DP Lanes 0x30 = 4DP Lanes

	i2c_tidsi_write(TI_DSI_ADDR1, 0x94, 0x80);	//DP Datenrate (0x80 = 2.7Gbps)
	i2c_tidsi_write(TI_DSI_ADDR1, 0x0D, 0x01);	//Enable DP PLL
	
	_delay_ms(10);
	//print_tidsi_register(0x0A);				        //Check PLL Lock
	i2c_tidsi_write(TI_DSI_ADDR1, 0x0D, 0x01);	//Enable DP PLL
	
	_delay_ms(10);
	//print_tidsi_register(0x0A);				//Check PLL Lock

	i2c_tidsi_write(TI_DSI_ADDR1, 0x95, 0x00);	//Post Cursor2 0dB,

	i2c_tidsi_write(TI_DSI_ADDR1, 0x11, 0xFF);	//try to change DSI RX equalization 

	//ASSR Registers
	i2c_tidsi_write(TI_DSI_ADDR1, 0x64, 0x01);	//
	i2c_tidsi_write(TI_DSI_ADDR1, 0x74, 0x00);	//
	i2c_tidsi_write(TI_DSI_ADDR1, 0x75, 0x01);	//
	i2c_tidsi_write(TI_DSI_ADDR1, 0x76, 0x0A);	//
	i2c_tidsi_write(TI_DSI_ADDR1, 0x77, 0x01);	//
	i2c_tidsi_write(TI_DSI_ADDR1, 0x78, 0x81);	//
	
	_delay_ms(100);
	i2c_tidsi_write(TI_DSI_ADDR1, 0x96, 0x0A);	    //Start DP Traning
	_delay_ms(100);

	dsi_config(configuration);		                     //Set Video Config 

The Video config function configurates the chip as following:

	{ 0x20, 0x40 },
	{ 0x21, 0x0B },
	{ 0x24, 0xC0 },
	{ 0x25, 0x03 },
	{ 0x2C, 0x21 },
	{ 0x2D ,0x80 },
	{ 0x30, 0x02 },
	{ 0x31, 0x80 },
	{ 0x34, 0x82 },
	{ 0x36, 0x05 },
	{ 0x38, 0x89 },
	{ 0x3A, 0x13 },

Thanks.

Best Regards,

Mark

Mark

For this video resolution, 2880 x 960 x 60Hz with 24Bit per Pixel, does the 2880 include the horizontal active + horizontal blank and similarly does 960 include both vertical active + vertical blank?

Thanks

David

Hi David,

actually it does not. The complete timing is:

H active: 2880
H FP: 137
H Sync: 33
H BP: 130
V active: 960
V FP: 19
V Sync: 2
V BP: 5
Framerate: 60hz
Bits per Pixel: 24

The compete Htotal is 3180, Vtotal is 986

Best Regards, 

Mark

Mark

Can you map the HSYNC output to the GPIO  pin and then use a scope to probe the GPIO pin to see if it meets the panel requirements?

Thanks

David

Hi David,

I set Register 0x5F to 0x20.

please see here the scoped signal on GPIO3:

It has ca. 1Mhz. This is the signal on the DSI side, right?

Unfortunately the GPIO is routed to an standard header, so I'm not sure how much the routing will influence the measurment.

Best Regards,

Mark 

Mark

Please see Figure 15 of the DSI86 for the DSI video transmitting diagram. 

HSYNC frequency = Pixel Clock / Htotal = 188.12/3180 = ~59.16kHz, this should be the panel requirement. If you are measuring 1MHz, then the source is sending the video outside the panel requirement.

Thanks
David

Hi David,

I tried again and I think I got the right measurment results. I tried now 2 different resolutions:

1. The problimatic one 2880 x 960 x 60Hz with 24Bit
-> The Debug output from my panel is:

MSA is stable..
H_TOTAL:3180
H_ACTIVE_START:163
H_ACTIVE_WIDTH:2880
H_SyncWidth:33
V_Total:986
V_ACTIVE_START:7
V_ACTIVE_WIDTH:960
V_SYNCWIDTH:2
PixelClockHz:188MHz
ColorDepth:0x1
ColorFormat:0x0
H Sync Polarity:0
V Sync Polarity:0

The Scope looks like: 

The frequency is about 59kHz. This matches your calculation. So the data seems to be okay, but the picture is very unstable and flickering. 
I made a quick video about the flickering, maybe you can see it: https://photos.app.goo.gl/FDfjPW28NRauBbXT9

Then I tried a second resolution: 

1920 x 720 x 60Hz

The Debug output of the panel is:

MSA is stable..
H_TOTAL:2056
H_ACTIVE_START:88
H_ACTIVE_WIDTH:1920
H_SyncWidth:32
V_Total:729
V_ACTIVE_START:6
V_ACTIVE_WIDTH:720
V_SYNCWIDTH:2
PixelClockHz:90MHz
ColorDepth:0x1
ColorFormat:0x0
H Sync Polarity:1
V Sync Polarity:1

The scope looks like:

The frequency is about 44,4 kHz. The picture is very stable.

Both resolutions work very fine with the pattern generator of the DSI86 chip. 

Best Regards,

Mark

Mark

Do you have the panel datasheet and in the datasheet, does the 59kHz match up with the panel HSYNC requirement?

Thanks

David

Hi David,

we use the Epiphan AV.io 4K USB Video Grabber. This device should be able to perform with any resolution. 

Also if I activate the DSI86 Pattern Generator I have a stable image with the same HSYC Scope. So I think this sould not be the problem.

Thanks.

Best Regards,

Mark

Mark

Looking at the video, it appears that there is a video frame, and then there is a blank screen afterward, is this the issue you saw? In this case, please check the VSYNC instead the HSYNC.

Thanks

David