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DS90UB913A-Q1: Jitter specification

Shinji Tsuji
Genius 14139 points
Part Number: DS90UB913A-Q1

Hi team,

I plan to use DS90UB913A and UB934 combination.

Thehn I have a question about jitter specification of DS90UB913A and DS90UB934.

1. tJINT Peak-to-Peak Serializer Output Total Jitter of UB913A

Could you explain the condition of PCLK input jitter for this spec? Maximum PCLK jitter is specified as 0.3UI.

Because CDR PLL bandwidth is set to f/15, any jitter less than f/15 frequency is not counted in this spec, is my understanding correct?

2. Tijit Input jitter of UB934

It is specified as maximum 0.4UI while the maximum output jitter (tJINT) is specified as maximum 0.52UI.

Could you advise how should I consider this jitter tolerance and output jitter Gap?

regards,

  • 0
    TI__Intellectual 2930 points

    1. Correct . Any jitter within the CDR bandwidth is tracked by CDR so is not counted

    2. 0.4UI is high-frequency jitter tolerance, beyond the CDR bandwidth. Output jitter at 934 is total jitter. Not just high frequency jitter, some of which is tolerated by the CDR, some of which is corrected by the Internal Equalizer if it is related to ISI

  • 0 in reply to Vijaya Ceekala
    TI__Genius 14139 points

    Hi Vijaya,

    < 2. 0.4UI is high-frequency jitter tolerance, beyond the CDR bandwidth. Output jitter at 934 is total jitter. Not just high frequency jitter, some of which is tolerated by  the CDR, some of which is corrected by the Internal Equalizer if it is related to ISI

    If UB913A output jitter doesn't count jitter below CDR bandwidth, then 0.52UI maximum jitter output(spec in datasheet) is all > CDR bandwidth, correct?

    In that case it will violate input tolerance of UB934's 0.4UI, is my understanding correct?

    regards,

  • 0 in reply to Shinji Tsuji
    TI__Intellectual 2930 points

    Not correct. I just mentioned that the output jitter counts jitter from all frequencies, including jitter below CDR bandwidth as well as high-frequency data dependent jitter that gets cancelled by Equalizers. So it does not violate 0.4UI CDR jitter spec

    Thanks

    Vijay

  • 0 in reply to Vijaya Ceekala
    TI__Genius 14139 points

    Hi Vijaya,

    It is still not clear to me about 913A output jitter definition.

    Could you explain the measurement condition of 913A tJINT?

    My understanding below

    - If 913A jitter output is measured using scope with PLL Loop BW=f/15, all the jitter lower than the scope BW is tracked and not counted as a jitter.

    - In that case, the tJINT spec specify the jitter out of PLL loop BW which cannot be tracked by the scope.

    - If tJINT is 0.52UI maximum, then it exceed the tolerable maximum jitter (0.4UI) of UB934.

    - DDJ(data dependent jitter) which is removed by DES EQ should be subtracted from SER jitter out.

    - Does tJINT include DDJ? If yes, how much is it?

    I would like to calculate the jitter margin as

    DES Jitter tolerance (xxUI) - SER out Jitter (yyUI) - jitter from media (zzUI) = jitter margin

    *Of course DDJ, Loop BW must be counted.

  • 0 in reply to Shinji Tsuji
    TI__Intellectual 2930 points

    Hello

      We share the measurement procedures and methods with specific customers under NDA. The jitter numbers given in the datasheet are Total jitter numbers

    Thanks

    Vijay