This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TUSB320: TUSB320 Contradictory data for mid-level PORT/ADDR Voltage in 6.5 Electrical Characteristics.

Part Number: TUSB320

Hello,

Lets say I wanted to configure the ADDR pin as mid-level for use of I2C pins as GPIO.

Then all I need to do is leave the ADDR unconnected.

The TUSB320 samples the voltage on the ADDR after it detects a valid level on EN_N pin.

At this point there is a pull up and pull down enabled on the ADDR pin.

The idea is that the voltage on the pin will "float" somewhere between VDD and GND according to the potential divider formed by the Pull up and pull down.

After the ADDR pin is sampled, the pull up and pull down are disabled - presumably to save power.

Therefore if the pin is floating then the voltage sampled at the pin should be PD/(PU+PD)*VDD = 1.1M/(1.1M+588k)*VDD = 0.65*VDD

But the datasheet states that to detect a valid mid-level state the ADDR pin voltage has to be between 0.28*VDD and 0.56*VDD

This makes no sense!

There must be a mistake in this table.

What is the correct data?