I'm trying to utilize the BIST engine in the DP83867E to generate and analyze the data packets for digital internal loopback (at 1000Base-T) and in a second step with external loopback (at 100Base-T, with loopback plug on RJ45 connector). I think I have the DP83867E set up correctly, but it doesn't seem like the BIST gets kicked off. Am I missing a step? Or am I using some wrong register values?
I have read the LOOPCR and it's value is , so I presume I don't need to actually write that register.
For the internal loopback I'm doing this (Digital loopback for 1000BASE-T operation in RGMII mode, with BIST enabled)
1) Write register 0x001F to 0x8000 to apply a software reset.
2) Write register 0x0000 to 0x4140 to force 1000BASE-T operation.
3) Write register 0x0032 to 0x00D3 to enable RGMII: === NOTE: This requires REGCR/ADDAR access (extended register space)
a) Write register 0x000D to 0x001F to prepare to load RegAdd 32 into ADDAR
b) Write register 0x000E to 0x0032 to point to RegAdd 32
c) Write register 0x000D to 0x401F to prepare to load data for RegAdd 32 into ADDAR
d) Write register 0x000E to 0x00D3 to enable RGMII
4) Write register 0x0016 to 0xD004 to
- enable continuous mode,
- enable PRBS packet generator,
- enable Packet BIST, and
- enable digital loopback.
5) Write register 0x001F to 0x4000 to apply a software restart.
6) Check PHYSTS (0x0011) and STS2 register (0x0017h) for BIST status === PHYSTS = 0b1010110000000010, STS2 = 0b0000001001000000
7) Check BICSRx register (0x0071, 0x0072) for number of error bytes === BICSR1 = 0b0000000000000000, BICSR2 = 0b0000000000000000
For the external loopback I'm doing this (External loopback for 100BASE-T operation in RGMII mode, with BIST enabled):
1. Write register 0x001F to 0x8000 to apply a software reset.
2. Write register 0x0000 to 0x6100 to force 100BASE-T operation.
3. Write register 0x0032 to 0x00D3 to enable RGMII
4. Write register 0x0016 to 0xF010 to
- enable continuous mode,
- enable PRBS packet generator,
- set BIST packet size to 64 bytes,
- enable Packet BIST, and
- enable external loopback.
5. Write register 0x001F to 0x4000 to apply a software restart.
6. Check PHYSTS (0x0011) and STS2 register (0x0017h) for BIST status ==> PHYSTS = 0b0110100000000010, STS2 = 0b0000001001000000
7. Check BICSRx register (0x0071, 0x0072) for number of error bytes ==> BICSR1 = 0b0000000000000000, BICSR2 = 0b0000000000000000
In both cases I get an indication in the STS2 register that the Packet Generator is busy, PRBS checker has not lost lock, but also PRBS checker is not locked (seems confusing / counter-intuitive). The BICSR2 doesn't indicate any errors, but I think the BIST hasn't actually run properly yet.
Any suggestions?