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TCA6424A: Some questions about TCA6424ATGJR

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1. VCCI is powered by external LDO, while VCCP is powered by system VSMPS (1.7V). What is the scope of power ripple that VCCI and VCCP need to meet respectively?

2. What is the normal working current and peak current of VCCI and VCCP?

3. Do the power supply of VCCI and VCCP need to be normally turned on? What is the leakage current in the normally turned on state?

4. Are other devices connected to the I2C control line affected?VSMPS (1.7V) is used to pull up the chip end, and the pull up resistance is 2.2K

5, INT and RESET connect to the two GPIO ports of the chip, do you need to pull up resistance, pull up resistance is generally designed for what?

6. When using P00 to P27 for GPIO, can each port be independently configured as input or output, not associated with other ports?When used as input/output, is a pull resistor needed?

7. ADDR generally selects pull up to 1V8 or ground processing by default?

  • 2018 said:

    Part Number: TCA6424A

    1. VCCI is powered by external LDO, while VCCP is powered by system VSMPS (1.7V). What is the scope of power ripple that VCCI and VCCP need to meet respectively?

    [Bobby] The recommended minimum is 1.65V for both VccI and VCCP. Depending on how you use the P-Ports, you may want to keep VCCP better regulated if you need to set the device to an output HIGH on the P-Ports to keep a certain VoH level.

    2. What is the normal working current and peak current of VCCI and VCCP?

    [Bobby] you can look at the standby mode parameter for this device to see this. Peak current is something we do not measure and at a low uA level, it would be difficult to get measurements.

    3. Do the power supply of VCCI and VCCP need to be normally turned on? What is the leakage current in the normally turned on state?

    [Bobby] Leakage current on which pin? This is spec'd in the datasheet in as Ii, Iih, Iil

    4. Are other devices connected to the I2C control line affected?VSMPS (1.7V) is used to pull up the chip end, and the pull up resistance is 2.2K

    [Bobby] Affected by what? Any time you have switching signals, there is always going to be some kind of shoot through current at any input stages such as SDA/SCL which use CMOS inputs. Stronger pull up resistors help have faster transistion times which woudl lower the shoot through current but raise the power dissipation during low levels due to open drain architecture design.

    5, INT and RESET connect to the two GPIO ports of the chip, do you need to pull up resistance, pull up resistance is generally designed for what?

    [Bobby] INT is an output, if you don't need it you can leave it floating. RESET can be tied to Vcc with a pull up resistor. Higher value resistors provide lower leakage but weaker biasing. Generally 4.7k or 10k pull up resistors can be used.

    6. When using P00 to P27 for GPIO, can each port be independently configured as input or output, not associated with other ports?When used as input/output, is a pull resistor needed?

    [Bobby] each p-port pin is independent. Any pin set as an input should be referenced to either GND or Vcc with a resistor.

    7. ADDR generally selects pull up to 1V8 or ground processing by default?

    [Bobby] It can be either one, it depends on what I2C address you want to set the device to and what I2C addresses are available on the bus. I2C addresses should be unique to a bus.

    Comments provided in BOLD.

    -Bobby

  • 1. The VSMPS power supply current of the system is insufficient (TYP100mA), and the current design is modified to supply power to external LDO.Is it possible to use an LDO to power BOTH VCCP and VCCI

    2. P06 is designed as WAKE_INT. The use scenario is that after the speech wake-up word is recognized, the wake-up chip sends out interrupt signal, and then the interrupt signal is fed back to the main chip

    3. When using the keypad function, it is necessary to initially connect VCCI to pull up. After pressing down, the low level is effective

    4. When PIO is designed as GPIO port, as input, whether external VCCI or GND reference level is required

    5. When PIO is designed as GPIO port and is used as output, whether external VCCI or GND reference level is required

  • 2018 said:

    1. The VSMPS power supply current of the system is insufficient (TYP100mA), and the current design is modified to supply power to external LDO.Is it possible to use an LDO to power BOTH VCCP and VCCI

    [Bobby] Using an LDO to power VCCP and VCCI is not a problem. 

    2. P06 is designed as WAKE_INT. The use scenario is that after the speech wake-up word is recognized, the wake-up chip sends out interrupt signal, and then the interrupt signal is fed back to the main chip

    [Bobby] I'm assuming here, you mean that P06 is an input. And when it sees the pin change state, the main INT on the device will assert to the main chip=processor.

    3. When using the keypad function, it is necessary to initially connect VCCI to pull up. After pressing down, the low level is effective

    4. When PIO is designed as GPIO port, as input, whether external VCCI or GND reference level is required

    [Bobby] It should be referenced to either GND or VCCP with an external resistor (10k or 4.7k will work).

    5. When PIO is designed as GPIO port and is used as output, whether external VCCI or GND reference level is required

    [Bobby] As an output, the GPIO is not required to be referenced to anything because it already will be referenced to either GND or Vcc.

    If you are looking to use the device as an input, you will need to quickly read the input ports immediately after the INT asserts in order to capture the key presses. The device does not latch the INT pin low nor does it have an internal FIFO to remember which keys were pressed.

    If you need a FIFO then you may want to look at TCA8418 instead.

     

    -Bobby