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Right now we got use DS280DF810 for application checker performance of QFSP28. but we found unstable on read error count.
i'm not sure how to config on chip?
Hi,
The PRBS checker enable channel register writes routine is shown below.
REG Value Mask Comment
0D 00 80 //Turn on de-serializer
79 40 40 //Set prbs_chkr_en=1
30 00 08 //Set prbs_en_dig_clk=0
30 08 08 //Set prbs_en_dig_clk=1
30 10 10 //Force reload of PRBS checker seed
30 00 10 //Undo force reload of PRBS checker seed
82 40 40 //Reset PRBS counters
82 00 40 //Un-reset PRBS counters
01 //Read PRBS status
01 //Read PRBS status
Cordially,
Rodrigo Natal
HSSC Applications Engineer
Hi Rodrigo Natal
i have one question, do you have how to read error count on chip?
Hi, see below.
Read PRBS Checker Error Count
Read the PRBS checker error count, assuming the PRBS checker has already been enabled.
Table. Register Writes to Read PRBS Checker Error Count
STEP |
SHARED/ CHANNEL REGISTER SET |
OPERATION |
REGISTER ADDRESS [HEX] |
REGISTER VALUE [HEX] |
WRITE MASK [HEX] |
COMMENT |
1 |
Channel |
Write |
82 |
80 |
80 |
Freeze the current error counter |
2 |
Channel |
Read |
83 |
|
|
Reg_0x83[2:0] = prbs_err_cnt[10:8] |
3 |
Channel |
Read |
84 |
|
|
Reg_0x84[7:0] = prbs_err_cnt[7:0] |
4 |
Total error count = ((Reg_0x83 & 0x03) << 8) | Reg_0x84 |
|||||
5 |
Channel |
Write |
82 |
00 |
80 |
Un-freeze the PRBS error counter |