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DS90UB948-Q1: PATTERN MODE

Amelie Zheng
Genius 10865 points
Part Number: DS90UB948-Q1

Hi Team,

My customer now use 947 and 948 to drive one display.

When enable 947 PATTERN MODE, the screen could display normally.

But when enable 948 PATTERN MODE, the screen could not display.

Here is  the screen parameters.I found that the CLK only support 44.1MHz.

In 948, if divide radio is 2, this means 140MHz is 70MHz. And if use dual LVDS, the LVDS CLK is only 35MHz, which is much lower than the display clk requirement (44.1MHz).

I am not sure whether my analysis is correct. Could you please also tell me how to configure 948 PATTERN MODE to make it suitable for 44.1MHz?

Thanks!

  • 0
    TI__Guru** 103215 points

    Hello Amelie,

    You are correct that the max PCLK from internal PATGEN is ~140MHz/2 = ~70MHz which means dual OLDI output is ~35MHz per port. If this clock rate is too low for the panel, then you must use the serializer PATGEN. 

    Also there is an option to supply external PCLK for the pattern generator at the BISTC pin. See register 0x2E

    Best Regards,

    Casey