This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB953A-Q1EVM: DS90UB953A-Q1EVM/DS90UB954A-Q1EVM

Part Number: DS90UB953A-Q1EVM

Hi All,

  1. Does those chips need to be reconfigure after they’re powered-off (is it based on SRAM or FLASH)?
  2. Can you please give me a general explanation of the configuration sequence of 954-953.
  3. Do we need a MCU on both side for some reason? Is there a preferred side for MCU configuration? (I know both direction works through I2C)
  4. How do we know that the both 953-954 are configured correctly and are ready to transmit data on the mipi channel?
  5. In the 954EVM datasheet the IDX pin is connected to a cap&res(C50&R49) when i expected a voltage divider as says the datasheet of 954-why is that? and whats the meaning of the cap?:
  6.                         

Thanks,

Ester

  • Hello,

    1) yes, if you need to configure the device, you will need to do this at every start.

    2) Configuration sequence: first Configure the 954 if required, then configure the 953 if required, after that configure the image sensor. At the end enable the 954 CSI-2 output and Port forwarding.

    3) You need an MCU at one side only. Mainly for Camera applications the MCU is located at the DES side.

    4) You will need to monitor LOCK and PASS pins/registers to see that you are receiving correct frames.

    5) You need the voltage devider on IDx and on MODE pins to choose the correct I2C address and correct Clocking mode.

  • 2) do you have any code example for basic configuration?

    4) please correct me if i didn't understood correctly- The LOCK indicate if there is a link between 953 and 954 and the PASS indicate if the data transferred correctly? what is the connection between the PASS and the BISTEN? 

    5) I meant, what is the meaning of the capacitor there- and if it is needed- why it doesn't exist in 953?

  • 2) unfortunately not. There is no basic code because your configuration (if needed) will depend on your use case. Basically the pair 953 and 954 will work with default settings.

    4) Lock: correct.

    Pass: if you use Pass-Threshold in reg 0x7D[1:0], then Pass will indicate the receiption of a valid data.

    BISTEN: to enable BIST mode. This has no relation to Pass.

    5) you can use the capacitor or not. It is just for decoupling.

  • Thank you for your answer, 

    Can you please explain to me more about the BIST functionality?
    Also, the datasheet point that the BIST uses GPIO0&GPIO1 - is it mandatory?

    If i need to pass 4 different signals from 953 to 954 through the GPIO's  - is there a GPIO i cannot use? (can you mention GPIO3 (INTB) and its meaning in your response?)

    Thank you in advance,

    Ester

  • BIST mode is an optional Built-In Self Test feature supports testing of the high-speed serial link and the back channel without external data connections. For more details, check the 954 d/s section "7.5.12 FPD-Link BIST Mode"

    GPIO 0 & 1 are only required if you control BIST using pin, to control the CLK source. But if you use register 0xB3 to control BIST and choose the CLK source, then the GPIOs will not be used at starting BIST.

    Yes, you can forward digital signals over 4 GPIOs from SER to DES or vice virsa.

    INTB pin functions as an Interrupt output, for Interrupt signals generated from the SER or the DES, and connected to the uC or SoC. For more details, refer to 954 d/s section "7.5.8 Interrupt Support"