Hi All,
- Does those chips need to be reconfigure after they’re powered-off (is it based on SRAM or FLASH)?
- Can you please give me a general explanation of the configuration sequence of 954-953.
- Do we need a MCU on both side for some reason? Is there a preferred side for MCU configuration? (I know both direction works through I2C)
- How do we know that the both 953-954 are configured correctly and are ready to transmit data on the mipi channel?
- In the 954EVM datasheet the IDX pin is connected to a cap&res(C50&R49) when i expected a voltage divider as says the datasheet of 954-why is that? and whats the meaning of the cap?:
Thanks,
Ester