• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 268 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

DS25BR440: Recommended Decoupling Network

DS25BR440: Logic High when VDD off?

Alpha H
Genius 10855 points
Part Number: DS25BR440

Hey INT team, 

I had a question regarding the DS25BR440. I'm powering the buffer wiith a 3.3V supply, but the EQ/PE/PWDN pins are powered from a different 3.3V source. Is there any problem with logic level "high" on the EQ/PE/PWDN pins while VDD is off?

Thanks,

AH