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DS90UB936-Q1: GPIO3/INTB input drive current

Roy Chou1
Genius 16045 points
Part Number: DS90UB936-Q1

Hi Team,

We face the same issue as the below link in TIe2e.(https://e2e.ti.com/support/interface/f/138/t/793067?tisearch=e2e-sitesearch&keymatch=DS90UB936%20GPIO3)

We set the GPIO3/INTB being the input port and CPU will provide the high and low signal to GPIO3/INTB. In CPU side, we could select the drive current to be 2mA/4mA/8mA.

As you see in below waveform, white is successful low to high transition and yellow is failed low to high transition. If we set drive current = 2mA, the low to high transition is seldom failed. If we select larger drive current, the failed rate will become bigger. 

We also change to use GPIO0/1/2/4/5/6, they are fine to use higher drive current. So we think the root cause is the multi-function of GPIO3.

Could you let me know the limitation of using GPIO3 like low to high slew rate or ......? Also let me know why higher drive current fail the transition.

PS. We also try to add the pull-up resistor(4.7k) to VDD(3.3V). the failed transition still occur. failed low to high transition. If we set drive current = 2mA, the low to high transition is seldom failed. If we select larger drive current, the failed rate will become bigger. 



We also change to use GPIO0/1/2/4/5/6, they are fine to use higher drive current. So we think the root cause is the multi-function of GPIO3.

Could you let me know the limitation of using GPIO3 like low to high slew rate or ......? Also let me know why higher drive current fail the transition.

PS. We also try to add the pull-up resistor(4.7k) to VDD(3.3V). the failed transition still occur. 

Regards,

Roy 

  • 0
    TI__Genius 11340 points

    Hi Roy,

    Are you using GPIO3 as an input? Could you try increasing the pull-up resistor to 10kOhm and see if this behavior disappears?

  • 0 in reply to Jiashow Ho
    TI__Genius 16045 points

    Hi jiashow,

    Lower the drive current may fix the issue, but could you explain the reason for us?

    Roy

  • 0 in reply to Roy Chou1
    TI__Guru** 103215 points

    Hello Roy,

    GPO3 is an open drain I/O so the host SoC should also use open drain type to drive an input to this pin.

    The external pullup resistor is required for open drain I/O as specified in the datasheet. When GPIO3 is set as an input (default), then the pin is high impedance and the pullup resistor will pull the pin to the high voltage state. If the SoC input is also set to open drain, then the SoC output is also high impedance in the logic high state. To drive low, the SoC can pull the pin down. There should be no reason that the SoC should try to actively drive logic high with push pull I/O because the pin is already pulled externally too VDDIO for the high state

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    TI__Genius 16045 points

    Hi Casey,

    I modify my question and short my question. Now my condition is that I don't use the external pull up circuit. Just connect GPIO3 to CPU GPIO pin.

    And my issue is that when CPU GPIO pin send the high signal.(original status is low)

    The GPIO3 pin will sometimes clamp on 1.3V. If we adjust the drive current(higher), the issue could be occurred frequently.

    But we we used same condition in GPIO0/1/2/6, the issue doesn't appear.

    Could you let me know the root cause?

    Roy

  • 0 in reply to Roy Chou1
    TI__Guru** 103215 points

    Hello Roy,

    External pullup resistor to VDDIO is required by 936 for GPIO3 and this is noted clearly in the datasheet pin table. This is not a valid configuration so please populate the pullup and utilize the pin with the recommendations I provided in the previous post. 

    GPIO3 has a different I/O structure compared with the other GPIO pins which use push/pull I/O. This is also noted in the datasheet in several places. This is why you see different behavior on GPIO3 compared with the other pins. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    TI__Genius 16045 points

    Hi Casey,

    As you see, this is our original schematic. And there is sometimes transition(low to high) fail in GPIO3(input type). (clamp on 1.3V)

    We find the reason is sensor_SW_RESET drive current. When we boost the drive current to let GPIO3 from low to high which means the low to high slew rate is more quick. The GPIO3 voltage will clamp on 1.3V.

    If there is anything unclearly, you could refer to e-mail attachment that I sent you. I think customer description is detail.

    I just would like to say the issue is not related whether we place a pull high resistor to VDDIO. It's related the low to high slew rate may cause the transition clamp in 1.3V. And only occur in GPIO3.

    Roy

  • 0 in reply to Casey McCrea
    TI__Genius 16045 points

    Hi Casey,

    As you see, this is our original schematic. And there is sometimes transition(low to high) fail in GPIO3(input type). (clamp on 1.3V)

    We find the reason is sensor_SW_RESET drive current. When we boost the drive current to let GPIO3 from low to high which means the low to high slew rate is more quick. The GPIO3 voltage will clamp on 1.3V.

    If there is anything unclearly, you could refer to e-mail attachment that I sent you. I think customer description is detail.

    I just would like to say the issue is not related whether we place a pull high resistor to VDDIO. It's related the low to high slew rate may cause the transition clamp in 1.3V. And only occur in GPIO3.

    Roy

  • 0 in reply to Roy Chou1
    TI__Guru** 103215 points

    Hello Roy,

    Again, there should be 0 drive current coming from the MCU to set the logic high state because the MCU output should be set to open drain I/O, not push pull. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    TI__Genius 16045 points

    Hi Casey,

    Understand. Thank you for your detailed comments.

    In addition, we consider that drive current of this pin couldn't be large. We know the 4.7k pull high resistor is suggestion. And VDDIO = 3.3V. We could calculate the drive current is 3.3V/4.7k=700mA. As I know this drive current need to be higher than 190uA in datasheet, but it looks like there is a maximum value of drive current should list in datasheet.

    Do we have this spec?

    Roy  

  • 0 in reply to Roy Chou1
    TI__Genius 16045 points

    Hi Casey, 

    Let me know if we could provide this spec? or just provide typical 4.7k pull high resistor directly.

    Roy

  • 0 in reply to Roy Chou1
    TI__Genius 11340 points

    Hi Roy,

    Please give me a couple days to find this information for you.

    Best,

    Jiashow

  • 0 in reply to Jiashow Ho
    TI__Genius 11340 points

    Hi Roy,

    I followed up with my team and we do not have a spec outside of the datasheet to provide. I would advise that just follow the datasheet.

    Best,

    Jiashow