Other Parts Discussed in Thread: TCA9545A, TCA9543A, TCA9544A, PCA9517
Hi There,
I am looking for an I2C buffer for a multi-master system and I ahve come across the TCA9517 (the chainable version of the TCA9515 I have used before). And I want to know if it is suitable for my application.
All of the example diagrams in the datasheet and in other TI I2C documentation I have found have the master(s) on one side of the device. Whereas in my system there will be masters on both sides of the buffer. and I want to ensure that all masters are able to utalise all slaves in the network.
To illustrate approximately, with A and B sides of the TCA9517 labelled:
TI diagram: master<>(A)TCA9517(B)<>slave(s)
<>(A)TCA9517(B)<>slaves(s)
My system: (master1+slaves)<>(A)TCA9517(B)<>(master2+slaves)
<>(A)TCA9517(B)<>(master3+slaves)
If I break my system up into separate diagrams for each master, then figure 16 in this document seems to indicate that it will work: https://www.ti.com/lit/an/scpa054/scpa054.pdf?ts=1594678565702&ref_url=https%253A%252F%252Fwww.google.com%252F
Can anyone confirm that my use-case is supported by this device? Or reccommend an alternative?
Thanks,
David