Part Number: DS90UB936-Q1
Other Parts Discussed in Thread: DS90UB954-Q1, DS90UB953-Q1,
Is the function block diagram feasible?
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Part Number: DS90UB936-Q1
Other Parts Discussed in Thread: DS90UB954-Q1, DS90UB953-Q1,
Is the function block diagram feasible?
Hello,
The latency between UB935 and UB936 is less than 2lines due to internal FIFO buffer design. One line is ~ 20us in most video transmission cases.
The cable latency can be calculated using this formula; 1ns/5inchs. For 2meters cable, the latency is <20ns, this can be ignored compared to Video line delay. so generally we don't care for the cable latency and its variation.
When I set the register 0x21 of DS90UB936-Q1,set bit7 CSI_REPLICATE=1,then I can measure the signal on the pin CSI_D3P/N,CSI_D4P/N ,but I can not measure the signal on the pin CSI_CLK1P/N. that's why?
Hello,
please make sure you have CSI CLK signal on the other CLK lane, i.e. CSI_CLK0P and CSI_CLK0N.
Also before enabling replication, make sure to disable CSI enable in reg 0x33 and Port Forwarding in reg 0x20. After enabling replication then you can enable CSI and forwarding.