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DP83869HM: DP83869HM Strap configuration details Request

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83TC811

Dear Sir,

I have used  DP83869HM * 3 in one of Design -- 3 Chips per Board. I am trying to make phys UP 

But i could not succeed 

the error are like phy could not able to perform auto negotiation and link is going down 

checked physical power and clock are proper 

then stated debugging phy reg values 

where i could read reg address 1 as 7949 continuously 

i doubt my strap configuration 

can any one suggest 

what/how should I configure for strap connections resistor for 

RGMII to Copper 

RGMII Connections Connected to Zynq MPSOC and other side are RJ45 connector 

I really confused with strap configuration resistor pull up and Pull downs, no kept all 3 chips strap pins/lines kept open, in order  to configure above modes what should keep I keep for Strap restors

I request you to give detailed Strap Configuration and Resistor values and whether to connect Pull up or down for respective Strap pin so that I could successfully establish all 3 connections   

the below messages are some debug messages 

thank you 

regards 

Balakrishna J 

-----lwIP TCP echo server ------

TCP packets sent to port 6001 will be echoed back

Start PHY autonegotiation TI
PHY Addr : 7 Reg Addr : 1F Reg Val : 0
PHY Addr : 7 Reg Addr : 0x1DF Reg Val : FFFF
PHY Addr : 7 Reg Addr : 9 Reg Val : 300
PHY Addr : 7 Reg Addr : 1DF Reg Val : 40
PHY Addr : 7 Reg Addr : 0 Reg Val : 1140
PHY Addr : 7 Reg Addr : 10 Reg Val : 5048
PHY Addr : 7 Reg Addr : 9 Reg Val : B00
PHY Addr : 7 Reg Addr : 0 Reg Val : 1340
Waiting for PHY to complete autonegotiation.
1 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
2 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
3 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
4 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
5 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
6 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
7 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
8 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
9 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
10 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
11 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
12 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
13 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
14 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
15 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
16 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
17 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
18 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
19 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
20 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
21 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
22 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
23 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
24 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
25 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
26 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
27 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
28 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140
29 PHY Addr : 7 Reg Addr : 1 Reg Val : 1140


Auto negotiation error
Phy setup error
Phy setup failure init_emacps

Reg Addres 1 phy_addr 7 Reg Value 7949

Ethernet Link down
Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

DHCP Timeout
Board IP: 192.168.1.10

Netmask : 255.255.255.0

Gateway : 192.168.1.1

TCP echo server started @ port 7

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

Reg Addres 1 phy_addr 7 Reg Value 7949

  • Hi Balakrishna,

    Can you please share a block diagram on how they are connected as well as your schematic? It would be helpful for me to understand the strap configurations you are referring to.

    Thanks,

    Cecilia

  • Dear Sir 

    Thank you for reply 

    please find the schematic uploaded here with sir 

    it is just straight connections from Phy to Zynq MPSoC Sir

    Awaiting for your early response sir 

    thank you 

    regards 

    Balakrishna J 

  • Hi Balakrishna

    It looks like your straps are all 4.75k, can you please share your exact Modes you need to be as well as the MAC IF? The modes are found in the datasheet. 

    Do all the PHYs in each board need to be configured the same way?

    We also have a TI precision labs video on how to use our bootstraps that you may review as well https://training.ti.com/ti-precision-labs-ethernet-bootstraps

    Thanks,

    Cecilia

  • Dear Sir ,

    as of now all strap connections are kept open, no resister combination are mounted 

    My Board has 3 DP83869HM Ethernet phys 

    all three need to Operate in RGMII Mode sir  RGMII to copper 

    datasheets refers mode  0,1,2,3 and op_mode 0,1 2 then  ANEG_DIS ,ANEGSEL_0,1 

    this reference only problem for me and confused to configure

    i will be waiting for your inputs to assemble resister values  for all three Phys sir

    the default mac suggest from XILINX VITIS Tool is { 0x00, 0x0a, 0x35, 0x00, 0x01, 0x02 } from lwip ; sir 

    Thank you  sir 

    regards 

    Balakrishna J 

  • Dear Sir 

    waiting for your reply sir 

    thank you 

    regards 

    Balakrishna J 

  • Dear Sir

    waiting for your reply sir 

    thank you 

  • Hello Balakrishna,

    You need to provide more details on the functions you require. You mention that there are different modes for auto-negotiation. Does your design require auto-negotiation enabled? If so, then you will need to set ANEG_DIS, ANEGSEL_0/1 to 0. This is a 2 level strap which means in order to strap to mode 0 you need to set Rlo to 2.49k as outlined in section 9.5.1 of the datasheet.

    As for RGMII to copper, those also need to be set to mode 0 which is the same strap setting and value as I mentioned above. 

    To confirm your strap settings, you can read Address 0x6E to confirm your settings have been confiugred properly. Can you please read those registers and share the values?

    Thanks,

    Cecilia

  • Dear Sir,

    I have tried few Combinations 

    1) Trying to set all strap connections to achieve mode 0 

    I observed that My board is able to auto negotiate directly with PC and  Ethernet Link down is coming 

    if connect through switch (un managed  ) board not able to establish connection itself 

    no auto negotiation  no thing 

    i don't understand anything , I never struggled with my previous boards (many) where i have used Marvel, Realtek chips  

    now paying my time for switching to TI only for  Ethernet  ,

    can't i get a document like this "SNLA292–May 2018 " which is for DP83TC811, 

    I really dont understand what additional information you required 

    i can understand only my time running faster 

    the requirement is very simple  : RGMII Connection with Copper  (1000-T link )

    auto negotiation needed 

    Thank you sir  

  • Can you please read registers 0x0 to 0x1F and 0x6E for the PHYs? I need these registers to understand and confirm the settings of the devices.

    Thanks,

    Cecilia

  • -----lwIP TCP echo server ------

    TCP packets sent to port 6001 will be echoed back

    Start PHY autonegotiation
    Waiting for PHY to complete autonegotiation.
    Auto negotiation error
    Phy setup error
    Phy setup failure init_emacps

    Ethernet Link down

    ============================= XEmacPs_PHYSetup Start =============================

    In XEmacPs_DetectPHY: Detected PHY address is 5

    Phy Addr:5 Reg Addr :0x0 Reg Data 0x1140

    Phy Addr:5 Reg Addr :0x1 Reg Data 0x7949

    Phy Addr:5 Reg Addr :0x1F Reg Data 0x0

    Phy Addr:5 Reg Addr :0x6E Reg Data 0xFFFF

  • Are you able to write to the registers through MDIO?

    In our datasheet we have a similar process through register configuration. 

    9.4.8.1 RGMII-to-Copper Ethernet Mode

    After configuring register 0x01DF, perform the following operations.

    • Write 0x1140 to register 0x0000

    • Write 0x5048 to register 0x0010

    • Write 0x0B00 to register 0x0009

    Thanks,

    Cecilia

  • Can you please also share your updated strap resistor values and which pins you have strapped?

  • Dear Sir,

    Points 1: 

    Present Stap Configurations  are 

    LED 0  ---- Pull down with 2.49K resister

    LED 1  ---- Pull down with 2.49K resister

    LED 2  ---- Pull down with 2.49K resister

    JTAG_TDO/GPIO_1  ---- Pull down with 2.49K resister

    and others are Open --- that means not pull up/down 

    Point 2)

    what ever  I  do with with strap configuration  pins   -- Strap Status Register show 0xFFFF only no update is happening at this register 

    Point 3) 

    • Write 0x1140 to register 0x0000

    • Write 0x5048 to register 0x0010

    • Write 0x0B00 to register 0x0009   by the way this 0x0009 register write value is 0x1B00 not 0x0B00 

    without setting (Enabling Manual Master configuration ) the 12nth bit of 0x0009 register  whatever i write in 0x0009 is not going to work for manual 

    master mode configuration 

    verified 100 times 

    if am wrong please say wrong , in case this point is valid then please update the datasheet

    Point 4) Actual Issue 

    after writing 0x0009 with value of   0x01B00 the chip is able to perform auto negation with PC and router/switch and all devices 

    but there is no pinging and actual communication

    and Strap Status Register show 0xFFFF only  , I Dont know whats happening inside chip, my Voltages are proper 

    Point 5) 

    Sir,

    If you are TI employee then i would like to say sorry sir, because we both are struggling sir,  please sir don't drag it 

     

    I would request TI experts to explain strap configuration properly with schematic what happens when we make pull up/down  for each/all strap pin combinations and their modes of operation 

     

  • Hi Balakrishna,

    I am sorry you are still running into this issue. After reviewing it looks like the issue is not on the straps.

    You are not reading the expected registers because there is no link on your PHY. You are reading 7949 on register 0x0001.


    That means there is not a proper connection between the PHY and link partner. You need to confirm that you are getting a proper link. Can you check the clock quality is okay on the crystal that it meets the PPM spec? Can you also probe the RX_CLK and make sure you see the 125MHz?

    Thanks,

    Cecilia

  • Dear Sir 

    i dont know what you have reviewed 

    0x0001 register default values are 0x7949 

    i have checked clock in force (manual master mode ) in all speeds 2.5M, 25M, 125M 

    all clock are ok   

    thank you very much 

    I learnt many things

    my issue is not resolved 

    Good bye TI 

    Thank you

  • Hi Balakrishna,

    That is correct, the default value is 0x7949 however if there is a link between devices you should be expecting bit 2 to be 1. In this read it shows that bit 2 is 0 therefore there is no link. 

    Can you please confirm that you are seeing the 125MHz clock on RX_CLK? 

    I am sorry your issue is still not resolved. I am trying my best to support you.

    Thanks,

    Cecilia

  • Dear Sir,

    The thread has been changed  and you have missed the flow of replies 

    I have told you already that  

    ==> if  I Connect it to PC directly,  then the value value of 0x0001 register is 0x794D and i could able to perform auto negotiation but no pinging and communication 

    even in this case also 0x006E register values are 0xFFFF only  

    in this case my connection are 

    LED_0 == pull down with 2.49k

    LED_1 == pull down with 2.49k

    LED_2 == pull down with 2.49k

    JTAG_TDO == pull down with 2.49k

    ==> if I connect to switch then the value of 0x0001 is 0x7949 and no auto negotiation also  because  chip not initialized in master mode then i started writing in 0x0009 with value 0x1B00 

    then it successfully auto negotiates but  still no pinging and communication and  0x006E register values are 0xFFFF only  

     i think now it make sense to you 

    in this case my connection are 

    LED_0 == pull down with 2.49k

    LED_1 == pull down with 2.49k

    LED_2 == pull down with 2.49k

    JTAG_TDO == pull down with 2.49k

    THANK YOU 

    REGARDS 

    BALAKRISHNA J

  • Hi Balakrishna,

    In the case where you are connecting to the PC, how are you reading the registers for 0x6E? Are you aware that there are extended registers that you need to access and they are read differently than 0X0-0x1F?

    Thanks,

    Cecilia

  • Dear Sir 

    Yes, I Know extended registers accessing , please let me know the impact and behavior,  once link is UP why it wont communicate, in order to make it for communication what i should 

    this is the simple question am asking 

    I think we cant do it sir 

    thank you 

    regards

  • Hi Balakrishna,

    Can you please provide the exact steps you are using to read the extended registers? Are other registers beyond 1F also reading back 0xFFFF?

    I am wondering if it is specifically this register that is not providing the correct value or if there is some other type of communication issue that needs to be reviewed.

    Thanks,

    Cecilia