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TPS65987D: Ignores SPI EEPROM Settings

Part Number: TPS65987D
Other Parts Discussed in Thread: TPS65987S

I am trying to use the TPS65987D in conjunction with the TUSB1046A to create a USBC DFP DP Alt mode port sink powered from the display.

Regardless of the contents of the SPI EEPROM, the TPS65987D broadcasts in PD rev3 (PD rev2 selected in NVM) and broadcasts the source capabilities that have been disabled in the config tool and then resets after about 300ms and starts the whole process over again. VBUS is coming in from the display and powering the TPS65987s, PP_HV1 is 5V, the EEPROM appears to load, there is data on the CC line, but the PD communications seem to have nothing to do with the EEPROM settings and then this ~300ms long sequence just keeps starting and stopping forever.

I have verified the NVM contents and it matches the full binary file created by the config tool. I would say the TPS65987d is ignoring the NVM, but when I remove the NVM, the TPS65987D advertises the source capabilities long then just stops.  

I do not see how the forever restarting is a OC or OV issue.

Need some advise on how to proceed.

  • Hello George,

    Would you be able to share you project file for the application configuration tool, as well as any PD messages being sent during this failure? 

  • Adam,

    Attached is the project file for the PP_HV1, sink, PD rev2 NVM I have been testing with.

    Attached are .csv and .tdc (Total Phase PD Analyzer format) of the PD log. Also attached a screen shot.

    Thanks in advance for your help.

    George

    Archive.zip

  • Adam,

    Any feedback on the .pjt and PD files I sent?

    Thanks,

    George

  • Hi George,

    Would you be able to help clarify some things for me? 

    1. Is the TPS65987D being powered from VBUS in a dead battery condition?
      1. If so, then it is not the one sending the source capabilities as it initially starts as a sink. If the display is used to power the TPS65987D over the Type-C VBUS, then you are seeing the source capabilities coming from the display. This is why it does not line up with the configuration of the TPS65987D
    2. Can you share a picture of your schematic for the TPS65987D? I would like to see your connections to the external SPI EEPROM as well as your pin strapping for the ADCIN pins
    3. Would you be able to explain how you are flashing the binary image onto the external EEPROM?

    My current thought is that the configuration is not being loaded properly because in this situation, the TPS65987D will start as the Sink/UFP, and we do not see any messages coming from the sink/UFP

  • Adam,

    Is the TPS65987D being powered from VBUS in a dead battery condition?
    <GES> Yes. Based on the SPI-MISO and ADCIN1, I believe the boot mode is BP_NoWait and Safe Configuration.

    If so, then it is not the one sending the source capabilities as it initially starts as a sink. If the display is used to power the TPS65987D over the Type-C VBUS, then you are seeing the source capabilities coming from the display. This is why it does not line up with the configuration of the TPS65987D
    <GES> Ok, but this is a bit confusing because when I look at a CC trace with display connected to another PD port, I never see the PD3 messages, only PD2. Only when I connect the TPS65987D, do I see PD3 messages.

    Can you share a picture of your schematic for the TPS65987D? I would like to see your connections to the external SPI EEPROM as well as your pin strapping for the ADCIN pins.
    <GES> Please see attached TPS65987D schematic screen shot.

    I currently have the ADCIN pins configured as:
    ADCIN 1: 0.8V which in combination with SPI-MISO being pulled up (1) should select BP_NoWait and Safe Configuration
    ADCIN 2: 100K PD, so I2C address = 000b

    SPI is powered from LDO_3V3_A with PUs on the SPI_CSZ and SPI_MISO.

    Would you be able to explain how you are flashing the binary image onto the external EEPROM?

    <GES> I have flashed the external EEPROM in two different ways:

    1.) Programmed a blank NVM on bench top programmer and soldered the programmed NVM to the PCB.

    2.) Programmed the EEPROM in-circuit using a USB to SPI programmer.

    I modified the EEPROM circuit by removing R45 and adding a 2-pin jumper to allow the EEPROM power isolation when using the in-circuit USB to SPI programmer. During in-circuit USB to SPI programing, the EEPROM power is provided from the USB programmer.

    I have verified the contents of the EEPROM matches the bin file created by the TPS config tool.


    My current thought is that the configuration is not being loaded properly because in this situation, the TPS65987D will start as the Sink/UFP, and we do not see any messages coming from the sink/UFP

    <GES> It does appear the EEPROM is not effecting the TPS65987D operation, but I do not see an issue with the SPI.

    Can you please verify the schematic?

    Could it be a reset issue with HRESET?

    Any input would be welcom. 

    Thanks,

    George

    TPS65987D_Schematic.png.zip

  • Hi George,

    Would you be able to walk me through how you generate the binary image to flash onto the EEPROM? Want to know the exact steps followed when generating the binary in the GUI

    Also, do you have the jumper populated so that LDO_3V3 powers the external EEPROM during a plug event? SPI EEPROM needs to be powered by LDO_3V3

  • Adam,

    I believe the EEPROM programming and interface are working fine. 

    The reseting after loading the EEPROM appears to have been caused by the fact that the TPS65987D was configured as a DFP and the connected display was also acting as a DFP. After the EEPROM load, the DFP deadlock caused the TPS65987D to simply reset and start over. 

    I reconfigured the TPS65987D to act a DRP preferring data and now the PD negotiation to TPS65987D as sink works and the data swap happens correctly (TPS65987D -> DFP and Display -> UFP). See attached trace screen shot.

    The issue now is that the TPS65987D is not completing the DP Alt mode transition. I see the VDM Discovery Identity,  Discovery SVIDs and Discovery Modes, but the TPS659987D does not issue an Enter mode command. I have been through the discovery transactions and there is nothing obvious that should stop the enter mode command. See attached PD trace.

    The 0x51 register information in the slvubh2b.pdf does not match the config tool. The slvubh2b.pdf does not describe the Preferred DP Role, Force USB Config or DFP_D/UFP_D Connected settings. I have currently have them set as:

    Preferred DP Role -> Prefers DFP_D

    Force USB Config -> Unchecked

    DFP_D/UFP_D Connected -> Only DFP_D connected.

    Attached is the current TPS65987D .pjt and .bin files. Can you please review and offer suggestions on DP settings that cause the DP Alt mode change to complete.

    The TUSB1046 USB path appears to working fine as the USB signals from the host are getting to the display and enabling the display USB hub functionality.

    Archive_08-18-20.zip

  • Hi George,

    Thank you for continuing to debug this on your own and finding that the problem was not that the configuration wasn't being loaded, but that the configuration itself was wrong. 

    As far as the DP alt mode, I believe the issue is in the Display Port Capabilities (0x51) register. There is a bit called "DisplayPort Mode Auto Entry Allowed". Make sure that this bit is set to 1, and the PD controller should complete the process of entering into DP mode autonomously 

  • Adam,

    Still not getting past VDM:DiscMode.

    The display reports USB2 not required, so I tried the following:

    1.) USB2 Signaling Not Used = 0, Multifunction Preferred = 1, DP Mode Auto Entry =1 

    2.) USB2 Signaling Not Used = 1 (match display discovery mode retrun), Multifunction Preferred = 1, DP Mode Auto Entry =1 

    Please see attached projects and CC analyzer trace.

    I am confident the USB3.x and USB2 interfaces are working to the display, but cannot find and do not know a reason why the TPS6587D stops at DiscMode.

    The display reports a UFPD of only C and E, while I have DFPD set to CDE, but it seems like it should be acceptable and just select either C or E.

    What am I missing here? I have dug through the DP Atl mode docs and it lloks like this should be working, but it is not. Is VCONN or something power related beyond the PD contract needed?

    Any suggestions would be welcome.

    Thanks,

    George

    Archive_08-19-20.zip

  • Any feedback or suggestions on resolving this DP Alt mode entry issue?

    George