- - - I could not to get answer on following URL, therefore I rethread about the USBN9604. - - -
https://e2e.ti.com/support/interface/f/138/t/926529
Hello E2E,
Please let me know about USBN9604.
Our customer is trying test on their board now. The board has failure on communication with PC.
When checking the data of USB communication between the PC and the board, if the connection is not successful, IN → NAK → IN → NAK → IN → NAK → ... IN and NAK are repeated during the data transmission and reception.
(IN indicates a data transmission request to the host, NAK indicates a data transfer failure.)
In other words, as a PC, I want you to send data that has been negotiated somehow when connecting, but it seems that our product has stopped sending data from the middle for some reason.
Furthermore, when checking the data between the CPU of the board and USBN9604, the "WARN bit" of "Main Event Register" may be set when the connection is not successful.
Questions;
: When is the WARN bit set? Please let me know the condition for it.
: What should the CPU do when the WARN bit is set?
(As far as I can see from the data sheet, it seems that it is sufficient to read the FWEV register once if the cause of WARN is removed. Is that correct?)
Best regards,
ACGUY