This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB960-Q1: How to setting the DS90UB960 with Ser 913A

Part Number: DS90UB960-Q1

Hi teams

Recently,I am using the 960 Des with four cameras which use 913A Ser,(1280*720 30fps)

The camera sensor I used need a trigger signal .

I setting the DS90UB960 as below:

./i2cset -f -y 8 0x3d 0x4c 0x01
./i2cset -f -y 8 0x3d 0x58 0x58
./i2cset -f -y 8 0x3d 0x5c 0x30
./i2cset -f -y 8 0x3d 0x5d 0xBA
./i2cset -f -y 8 0x3d 0x65 0xBA
./i2cset -f -y 8 0x3d 0xb0 0x1c
./i2cset -f -y 8 0x3d 0x70 0x1e
./i2cset -f -y 8 0x3d 0x7c 0xc0
./i2cset -f -y 8 0x3d 0x6d 0x7f
sleep 0.2
./i2cset -f -y 8 0x3d 0x32 0x01
./i2cset -f -y 8 0x3d 0x33 0x03
./i2cset -f -y 8 0x3d 0x32 0x12
./i2cset -f -y 8 0x3d 0x33 0x03
./i2cset -f -y 8 0x3d 0x20 0x00
the 913A setting as below,This is provided by the camera supplier
./i2cset -f -y 8 0x18 0x05 0x21
./i2cset -f -y 8 0x18 0x0d 0x99
the pictrue as below:
Could you help me check why Image data discontinuity  ?  Is there any other need setting ?
BRs
thanls
  • Hello Yingjin,

    How many Cameras are connected to the 960? just one or more?

    In which mode is the 913A running? 10-bit, 12-bit LF or 12-bit HF?

    Which clocking mode? PCLK or External Clock?

    What is the value of the Oscillator clock?

    What is the value of the PCLK coming from the image sensor? Have you measured this?

  • Hi  Hamzeh

    thanks for your reply.

    1)  How many Cameras are connected to the 960? just one or more?

         We will use four cameras finally. Only one camera module is used in the debugging phase

    2)  In which mode is the 913A running? 10-bit, 12-bit LF or 12-bit HF?

         raw10 mode

    3)  Which clocking mode? PCLK or External Clock?

         PCLK, it did not use external clock.The camera supplier only uses the gpio0 of 913a to continuously output a high level to trigger data fetching.

         That's not what I understand,Based on my understand,the ti960 can work in internal clock or external clock mode pass through to the ser.I am not 

         sure that only use gpio0 of 913A output high value is ok  ?

    4   What is the value of the Oscillator clock?

         We have no way to measure the synchronization signal of the module because the module is not disassembled

    BRs

    thanks

  • Hello Yingjin,

    you do have clear picture but wrong colors, that means there is something wrong with the 10-bits connections (MSB to LSB) and or wrong PCLK value.

    Please change the following from your settings:

    Keep reg 0x70, 0x71, 0x7C, 0xB0 as default. 

    Additionally you may try enabling Pattern Generator on the 960 and see if the picture looks normal on the display or not?

  • If enabling Pattern Generator on the 960,   wiil be work without  the ser device ?  disconnect the ser FPD-LINK ? 

  • Yes, when enabling the Pattgen on the 960 you do not need any SER or Image sensor connected.

  •  I config 960 to Pattgen with imx8qm Soc,    using linux system,  can't  capture any picture data , use v4l2-ctl tools.

    the driver seems all OK,   /dev/video0  /dev/video1    /dev/video2   /dev/video3  and /dev/media0   all OK.

    And I measuring  the the mipi-csi pins ,  "mipi_clk_p" and "mipi_clk_n"  are same wave,  frequency is 31.5KHz.

    What is the reason? 

     

     

     

  • CSI CLK can't be 31.5KHz. It should be between 184MHz and 832MHz.

    Please follow the instructions in the 960 d/s, section "7.5.12 Pattern Generation". Also in section 7.5.12.4 you have a Code Example for the Pattern Generator.

  • Hi Hamzeh,

    I already config Pattern  with  the example.  the code is following.    

    but  "mipi_clk_p" and "mipi_clk_n"  are same wave,  frequency is 31.5KHz.

    What is wrong with my code?

     

    ds90_write_shared(ds90,0x20,0x30);

    //#Patgen Fixed Colorbar 1280x720p30
    ds90_write_shared(ds90,0x32,0x01); //# CSI0 enable
    ds90_write_shared(ds90,0x33,0x01); //# CSI0 enable

    ds90_write_shared(ds90,0xB0,0x00); //# Indirect Pattern Gen Registers
    ds90_write_shared(ds90,0xB1,0x01); //# PGEN_CTL
    ds90_write_shared(ds90,0xB2,0x01);
    ds90_write_shared(ds90,0xB1,0x02); //# PGEN_CFG
    ds90_write_shared(ds90,0xB2,0x33);
    ds90_write_shared(ds90,0xB1,0x03); //# PGEN_CSI_DI
    ds90_write_shared(ds90,0xB2,0x24);
    ds90_write_shared(ds90,0xB1,0x04); //# PGEN_LINE_SIZE1
    ds90_write_shared(ds90,0xB2,0x0F);
    ds90_write_shared(ds90,0xB1,0x05); //# PGEN_LINE_SIZE0
    ds90_write_shared(ds90,0xB2,0x00);
    ds90_write_shared(ds90,0xB1,0x06); //# PGEN_BAR_SIZE1
    ds90_write_shared(ds90,0xB2,0x01);
    ds90_write_shared(ds90,0xB1,0x07); //# PGEN_BAR_SIZE0
    ds90_write_shared(ds90,0xB2,0xE0);
    ds90_write_shared(ds90,0xB1,0x08); //# PGEN_ACT_LPF1
    ds90_write_shared(ds90,0xB2,0x02);
    ds90_write_shared(ds90,0xB1,0x09); //# PGEN_ACT_LPF0
    ds90_write_shared(ds90,0xB2,0xD0);
    ds90_write_shared(ds90,0xB1,0x0A); //# PGEN_TOT_LPF1
    ds90_write_shared(ds90,0xB2,0x04);
    ds90_write_shared(ds90,0xB1,0x0B); //# PGEN_TOT_LPF0
    ds90_write_shared(ds90,0xB2,0x1A);
    ds90_write_shared(ds90,0xB1,0x0C); //# PGEN_LINE_PD1
    ds90_write_shared(ds90,0xB2,0x0C);
    ds90_write_shared(ds90,0xB1,0x0D); //# PGEN_LINE_PD0
    ds90_write_shared(ds90,0xB2,0x67);
    ds90_write_shared(ds90,0xB1,0x0E); //# PGEN_VBP
    ds90_write_shared(ds90,0xB2,0x21);
    ds90_write_shared(ds90,0xB1,0x0F); //# PGEN_VFP
    ds90_write_shared(ds90,0xB2,0x0A);

    =======================================================

    A nother question is " How can I access 953's registers  by  960's   I2C? "

  • Hello,

    using the Code from the datasheet you should get a real CSI signal. I am not sure why you are getting 31KHz!! you must be doing something wrong!!

    You need to define the SER ID in the DES register 0x5B and if required an Alias for the SER in reg 0x5C.

    After that you need to enable I2C pass through in reg 0x58.