Compiler/DS90UB949-Q1: DS90UB949 image transmission mechanism

user6310590

Part Number: DS90UB949-Q1
Other Parts Discussed in Thread: DS90UB924-Q1

Tool/software: TI C/C++ Compiler

1:From the 949 specification, what you support is 1080P 60fps or 1920X1200 image input; now our image is 1152 X2 X 576 size, 60fps dynamic image per second, please evaluate whether 949 supports this irregular resolution

2:What kind of splicing does the CPU have to do after entering the 949 through HDMI to effectively make one of the FPDLINK output Figure 1 and the other one FPDLINK output Figure 2?

over 5 years ago

0 Michael.Walker over 5 years ago

TI__Mastermind 19720 points

Hi,

The 949 supports a wide variety of resolutions as long as the PCLK of the image resolution and frame rate are below 170MHz. to calculate the PCLK you multiply your Total Horizontal(including blanking) * Total Vertical(including blanking) * FPS = PCLK frequency.

so for 1920 X1200 at 60 FPS

lets say there is 10% horizontal blanking and 10% vertical blanking so Total Horizontal = 1920*1.1 = 2112 and Total Vertical = 1200*1.1 = 1320

PCLK = 2112 *1320 *60 = 167,270,400 or ~167.3 MHz

what is your resolution including blanking? 1152 X2 X 576? why is there a X2 here? what do you mean by dynamic image per second?

Which figure are you referring to? Figure 1 in the datasheet is: "Serializer VOD Output" and figure 2 is: "Output Transition Times" what do you mean by splicing?

Regards,

Michael W.

0 user6310590 over 5 years ago in reply to Michael.Walker

Prodigy 180 points

Could you please provide your E-mail to me?I will send email tell you.Because E2E don't insert figure, so It's hard for me to describe it to you .TKS

0 Michael.Walker over 5 years ago in reply to user6310590

TI__Mastermind 19720 points

Hi,

Can you accept my friendship request and can you send me the figures in a chat?

You could attach the images in a zip files and then attach them to a reply.

Regards,

Michael W.

0 user6310590 over 5 years ago in reply to Michael.Walker

Prodigy 180 points

1152X576X2 mean two 1152X576 picture, it don’t include blanking. CPU finish splicing image, then CPU send it to ds90ub949-q1,the frame is 60fps. I have 2 questions.

Q1: Can the ds90ub949-q1 chip meet our resolution and frame rate requirements?

Q2: Which of the following image stitching methods should the CPU use to meet the ds90ub949-q1 chip requirements? A?B?C?

A: Vertical stitching

B: Horizontal stitching

C: Horizontal odd and even pixels stitching

ds90ub949-q1 QUESTION.doc

0 Casey McCrea over 5 years ago in reply to user6310590

TI__Guru** 103215 points

Hello,

Yes this should be supported by 949 and you would use option C to stitch the image. See this example which uses the same methodology. It is focused on 947 but 947 can be removed from this block diagram to get the same effect from 949 to two deserializers:

2402.947_Validation_Odd_Even_on_FPD3.pdf

Best Regards,

Casey