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TPS65987D: Power dissipation across Power FET

Part Number: TPS65987D
Other Parts Discussed in Thread: TPS25750

Hi We are  planning to   use  TPS65987D for 100W power sink application . How  much power will be  dissipated  across power FET . How we  should calculate the temperature  rise of the IC .

  • Hello,

    You can calculate the power loss over the FET based on the internal resistance of the power path and the amount of current going through the PD controller. If this is a sink only application, you can use the Power Duo functionality which closes both of the internal power paths at the same time, allowing for both FETs to be used for one power direction, cutting the Rdson in half, which also cuts down the thermal dissipation. 

    USB-C-PD-DUO-EVM

  • Hi  Adam 

    Thanks  for reply. I need to do source 15W and sink (100W)  both ,Is there is any other way  to decrease  power  dissipation. Lets  say by  using external FET also in prallel with internal power path.

     

  • Yes, you could use both of the internal FETs in parallel as the sink, and have an external power path for the source.

    However, are you set on using the TPS65987D? If your system requires sinking 100W and sourcing 15W, I would suggest using the TPS25750 as this is the exact application this device was designed for. The high voltage sink FET is rated to a higher current than the TPS65987D, so sinking at 5A should not be an issue. This would be the most cost competitive solution as you do not have to work about purchasing an external pwoer path or worry about the heat causing issues